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authorBoris BREZILLON <boris.brezillon@free-electrons.com>2014-09-02 09:50:15 +0200
committerMike Turquette <mturquette@linaro.org>2014-09-02 15:37:11 -0700
commit3ef9dd2bab7d6a013f75f9fb226d0191e9981288 (patch)
tree057ff3bdfe0a9df7b759991f529d0cc75da8b82a /block/blk-timeout.c
parent078a3eb519dacf28cb7c9bb2ad2f62e19ca6dcc2 (diff)
downloadlinux-3ef9dd2bab7d6a013f75f9fb226d0191e9981288.tar.bz2
clk: at91: rework PLL rate calculation
The AT91 PLL rate configuration is done by configuring a multiplier/divider pair. The previous calculation was over-complicated (and apparently buggy). Simplify the implementation and add some comments to explain what is done here. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Reported-by: Gaël PORTAY <gael.portay@gmail.com> Tested-by: Gaël PORTAY <gael.portay@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'block/blk-timeout.c')
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