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authorHaojian Zhuang <haojian.zhuang@gmail.com>2012-08-04 23:57:38 +0800
committerHaojian Zhuang <haojian.zhuang@gmail.com>2012-08-16 16:17:00 +0800
commita03d8b1e4606be10c0fedf1ccabe22dc3a5060f9 (patch)
treeb8bf5e898c654b4f17bed019fcc1b0ec7038d67e /arch
parentc2b7e05c753156dfba3240c59c400d557c5c8746 (diff)
downloadlinux-a03d8b1e4606be10c0fedf1ccabe22dc3a5060f9.tar.bz2
ARM: mmp: enable tauros2 cache in pxa910
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/pxa910.dtsi5
-rw-r--r--arch/arm/mach-mmp/pxa910.c4
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/pxa910.dtsi b/arch/arm/boot/dts/pxa910.dtsi
index aebf32de73b4..a3be44d86bcd 100644
--- a/arch/arm/boot/dts/pxa910.dtsi
+++ b/arch/arm/boot/dts/pxa910.dtsi
@@ -25,6 +25,11 @@
interrupt-parent = <&intc>;
ranges;
+ L2: l2-cache {
+ compatible = "marvell,tauros2-cache";
+ marvell,tauros2-cache-features = <0x3>;
+ };
+
axi@d4200000 { /* AXI */
compatible = "mrvl,axi-bus", "simple-bus";
#address-cells = <1>;
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 6da52e9f2bdc..51ac8d1898c1 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -14,6 +14,7 @@
#include <linux/io.h>
#include <linux/platform_device.h>
+#include <asm/hardware/cache-tauros2.h>
#include <asm/mach/time.h>
#include <mach/addr-map.h>
#include <mach/regs-apbc.h>
@@ -116,6 +117,9 @@ static struct clk_lookup pxa910_clkregs[] = {
static int __init pxa910_init(void)
{
if (cpu_is_pxa910()) {
+#ifdef CONFIG_CACHE_TAUROS2
+ tauros2_init(0);
+#endif
mfp_init_base(MFPR_VIRT_BASE);
mfp_init_addr(pxa910_mfp_addr_map);
pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);