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authorPierre Gondois <pierre.gondois@arm.com>2022-11-07 16:57:12 +0100
committerHeiko Stuebner <heiko@sntech.de>2022-11-22 23:28:44 +0100
commit848343c0b4d64821aec19b2cff47b58f77362d38 (patch)
treef77035ca9bfe9da67f2a416c16c89c14b73992cd /arch
parentafbaed737fb45bcae91e4606025fb31da71b9dfe (diff)
downloadlinux-848343c0b4d64821aec19b2cff47b58f77362d38.tar.bz2
arm64: dts: rockchip: update cache properties for rk3308 and rk3328
The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Link: https://lore.kernel.org/r/20221107155825.1644604-20-pierre.gondois@arm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3308.dtsi1
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328.dtsi1
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 2dfa67f1cd67..dd228a256a32 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -96,6 +96,7 @@
l2: l2-cache {
compatible = "cache";
+ cache-level = <2>;
};
};
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 96a7a777bae8..6d7a7bf72ac7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -102,6 +102,7 @@
l2: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};