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authorGaël PORTAY <gael.portay@gmail.com>2014-09-01 23:29:46 +0200
committerNicolas Ferre <nicolas.ferre@atmel.com>2014-09-05 17:19:35 +0200
commit650ca015fd52b130af82518d5ed338f52974cec4 (patch)
treee8d2445d4c402b57087ace751c90a68cafe19801 /arch
parent69e273c0b0a3c337a521d083374c918dc52c666f (diff)
downloadlinux-650ca015fd52b130af82518d5ed338f52974cec4.tar.bz2
ARM: at91/dt: sam9g20: set at91sam9g20 pllb driver
The at91sam9g20 SOC uses its own pllb implementation which is different from the one inherited from at91sam9260 SOC. Signed-off-by: Gaël PORTAY <gael.portay@gmail.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/at91sam9g20.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index 31f7652612fc..4e0abbd9d655 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -40,6 +40,7 @@
};
pllb: pllbck {
+ compatible = "atmel,at91sam9g20-clk-pllb";
atmel,clk-input-range = <2000000 32000000>;
atmel,pll-clk-output-ranges = <30000000 100000000 0 0>;
};