diff options
author | Benoit Cousson <b-cousson@ti.com> | 2011-08-16 21:02:01 +0530 |
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committer | Benoit Cousson <b-cousson@ti.com> | 2011-10-04 22:27:02 +0200 |
commit | 189892f496cd01bf1af149bd6f7f380fcf67489d (patch) | |
tree | 0fabf6e3b648cb30d86df6d146fd7a6ffa42c372 /arch | |
parent | 492beedfd80e48be48211b5e7bce9b85fb141a81 (diff) | |
download | linux-189892f496cd01bf1af149bd6f7f380fcf67489d.tar.bz2 |
arm/dts: Add initial device tree support for OMAP3 SoC
Add initial OMAP3 soc file with empty ocp bus.
Based on initial patch from Manju:
http://www.spinics.net/lists/linux-omap/msg55830.html
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: G, Manjunath Kondaiah <manjugk@ti.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/omap3.dtsi | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi new file mode 100644 index 000000000000..d558785c8b2c --- /dev/null +++ b/arch/arm/boot/dts/omap3.dtsi @@ -0,0 +1,44 @@ +/* + * Device Tree Source for OMAP3 SoC + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "ti,omap3430", "ti,omap3"; + + /* + * The soc node represents the soc top level view. It is uses for IPs + * that are not memory mapped in the MPU view or for the MPU itself. + */ + soc { + compatible = "ti,omap-infra"; + }; + + /* + * XXX: Use a flat representation of the OMAP3 interconnect. + * The real OMAP interconnect network is quite complex. + * Since that will not bring real advantage to represent that in DT for + * the moment, just use a fake OCP bus entry to represent the whole bus + * hierarchy. + */ + ocp { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + ti,hwmods = "l3_main"; + + intc: interrupt-controller@1 { + compatible = "ti,omap3-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; +}; |