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authorLennert Buytenhek <buytenh@wantstofly.org>2008-03-27 14:51:41 -0400
committerNicolas Pitre <nico@marvell.com>2008-03-27 14:51:41 -0400
commit159ffb3a04f6bc619643af680df406faafd0199d (patch)
tree45d76928836065a3207c15e5bc2037b186213ace /arch
parentd50c60a87a95a42f1bc984150d3eebc77a0b0c14 (diff)
downloadlinux-159ffb3a04f6bc619643af680df406faafd0199d.tar.bz2
Orion: general cleanup
Various Orion cleanups: - Unify GPL license banner format across all files. - Unify naming of .h double inclusion guard preprocessor macros. - Unify spelling of "PCIe" (variants seen: PCIE, PCIe, PCI-EX.) - Various typo fixes. - Remove __init attributes from prototypes declared in headers. - Remove trailing comments from #endif statements. - Mark a couple of locally-used-only structs static. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-orion/addr-map.c8
-rw-r--r--arch/arm/mach-orion/common.c6
-rw-r--r--arch/arm/mach-orion/common.h19
-rw-r--r--arch/arm/mach-orion/db88f5281-setup.c4
-rw-r--r--arch/arm/mach-orion/gpio.c4
-rw-r--r--arch/arm/mach-orion/irq.c2
-rw-r--r--arch/arm/mach-orion/kurobox_pro-setup.c4
-rw-r--r--arch/arm/mach-orion/pci.c32
-rw-r--r--arch/arm/mach-orion/rd88f5182-setup.c4
9 files changed, 42 insertions, 41 deletions
diff --git a/arch/arm/mach-orion/addr-map.c b/arch/arm/mach-orion/addr-map.c
index ecca987b57e9..738de617e3c7 100644
--- a/arch/arm/mach-orion/addr-map.c
+++ b/arch/arm/mach-orion/addr-map.c
@@ -5,8 +5,8 @@
*
* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
*
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
@@ -45,9 +45,9 @@
* Generic Address Decode Windows bit settings
*/
#define TARGET_DDR 0
+#define TARGET_DEV_BUS 1
#define TARGET_PCI 3
#define TARGET_PCIE 4
-#define TARGET_DEV_BUS 1
#define ATTR_DDR_CS(n) (((n) ==0) ? 0xe : \
((n) == 1) ? 0xd : \
((n) == 2) ? 0xb : \
@@ -64,7 +64,7 @@
#define WIN_EN 1
/*
- * Helpers to get DDR banks info
+ * Helpers to get DDR bank info
*/
#define DDR_BASE_CS(n) ORION_DDR_REG(0x1500 + ((n) * 8))
#define DDR_SIZE_CS(n) ORION_DDR_REG(0x1504 + ((n) * 8))
diff --git a/arch/arm/mach-orion/common.c b/arch/arm/mach-orion/common.c
index aae157d360e6..85c8f18268ad 100644
--- a/arch/arm/mach-orion/common.c
+++ b/arch/arm/mach-orion/common.c
@@ -5,8 +5,8 @@
*
* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
*
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
@@ -363,7 +363,7 @@ void __init orion_init(void)
orion_setup_eth_wins();
/*
- * REgister devices
+ * Register devices.
*/
platform_device_register(&orion_uart);
platform_device_register(&orion_ehci0);
diff --git a/arch/arm/mach-orion/common.h b/arch/arm/mach-orion/common.h
index 74f23e61c401..bcc31adaca15 100644
--- a/arch/arm/mach-orion/common.h
+++ b/arch/arm/mach-orion/common.h
@@ -1,13 +1,13 @@
-#ifndef __ARCH_ORION_COMMON_H__
-#define __ARCH_ORION_COMMON_H__
+#ifndef __ARCH_ORION_COMMON_H
+#define __ARCH_ORION_COMMON_H
/*
* Basic Orion init functions used early by machine-setup.
*/
-void __init orion_map_io(void);
-void __init orion_init_irq(void);
-void __init orion_init(void);
+void orion_map_io(void);
+void orion_init_irq(void);
+void orion_init(void);
extern struct sys_timer orion_timer;
/*
@@ -43,7 +43,7 @@ struct pci_bus *orion_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
* (/mach-orion/gpio.c).
*/
-void __init orion_gpio_set_valid_pins(u32 pins);
+void orion_gpio_set_valid_pins(u32 pins);
void gpio_display(void); /* debug */
/*
@@ -52,7 +52,7 @@ void gpio_display(void); /* debug */
struct mv643xx_eth_platform_data;
-void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data);
+void orion_eth_init(struct mv643xx_eth_platform_data *eth_data);
/*
* Orion Sata platform_data, used by machine-setup
@@ -60,7 +60,7 @@ void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data);
struct mv_sata_platform_data;
-void __init orion_sata_init(struct mv_sata_platform_data *sata_data);
+void orion_sata_init(struct mv_sata_platform_data *sata_data);
struct machine_desc;
struct meminfo;
@@ -68,4 +68,5 @@ struct tag;
extern void __init tag_fixup_mem32(struct machine_desc *, struct tag *,
char **, struct meminfo *);
-#endif /* __ARCH_ORION_COMMON_H__ */
+
+#endif
diff --git a/arch/arm/mach-orion/db88f5281-setup.c b/arch/arm/mach-orion/db88f5281-setup.c
index aad62efa1daf..a0a9e4851b5f 100644
--- a/arch/arm/mach-orion/db88f5281-setup.c
+++ b/arch/arm/mach-orion/db88f5281-setup.c
@@ -5,8 +5,8 @@
*
* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
*
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
diff --git a/arch/arm/mach-orion/gpio.c b/arch/arm/mach-orion/gpio.c
index 5a7d9cc9b800..afc7be08b30f 100644
--- a/arch/arm/mach-orion/gpio.c
+++ b/arch/arm/mach-orion/gpio.c
@@ -5,8 +5,8 @@
*
* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
*
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
diff --git a/arch/arm/mach-orion/irq.c b/arch/arm/mach-orion/irq.c
index dc8cb15a817f..7033cc1360ec 100644
--- a/arch/arm/mach-orion/irq.c
+++ b/arch/arm/mach-orion/irq.c
@@ -6,7 +6,7 @@
* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
*
* This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
+ * License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
diff --git a/arch/arm/mach-orion/kurobox_pro-setup.c b/arch/arm/mach-orion/kurobox_pro-setup.c
index bf7034df8a62..be417e7f423d 100644
--- a/arch/arm/mach-orion/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion/kurobox_pro-setup.c
@@ -3,8 +3,8 @@
*
* Maintainer: Ronen Shitrit <rshitrit@marvell.com>
*
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
diff --git a/arch/arm/mach-orion/pci.c b/arch/arm/mach-orion/pci.c
index e3aab14b943c..59684cc329bc 100644
--- a/arch/arm/mach-orion/pci.c
+++ b/arch/arm/mach-orion/pci.c
@@ -1,12 +1,12 @@
/*
* arch/arm/mach-orion/pci.c
*
- * PCI and PCIE functions for Marvell Orion System On Chip
+ * PCI and PCIe functions for Marvell Orion System On Chip
*
* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
*
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
@@ -18,12 +18,12 @@
#include "common.h"
/*****************************************************************************
- * Orion has one PCIE controller and one PCI controller.
+ * Orion has one PCIe controller and one PCI controller.
*
- * Note1: The local PCIE bus number is '0'. The local PCI bus number
- * follows the scanned PCIE bridged busses, if any.
+ * Note1: The local PCIe bus number is '0'. The local PCI bus number
+ * follows the scanned PCIe bridged busses, if any.
*
- * Note2: It is possible for PCI/PCIE agents to access many subsystem's
+ * Note2: It is possible for PCI/PCIe agents to access many subsystem's
* space, by configuring BARs and Address Decode Windows, e.g. flashes on
* device bus, Orion registers, etc. However this code only enable the
* access to DDR banks.
@@ -31,7 +31,7 @@
/*****************************************************************************
- * PCIE controller
+ * PCIe controller
****************************************************************************/
#define PCIE_BASE ((void __iomem *)ORION_PCIE_VIRT_BASE)
@@ -67,7 +67,7 @@ static int pcie_valid_config(int bus, int dev)
/*
- * PCIE config cycles are done by programming the PCIE_CONF_ADDR register
+ * PCIe config cycles are done by programming the PCIE_CONF_ADDR register
* and then reading the PCIE_CONF_DATA register. Need to make sure these
* transactions are atomic.
*/
@@ -133,7 +133,7 @@ static int pcie_wr_conf(struct pci_bus *bus, u32 devfn,
return ret;
}
-struct pci_ops pcie_ops = {
+static struct pci_ops pcie_ops = {
.read = pcie_rd_conf,
.write = pcie_wr_conf,
};
@@ -170,23 +170,23 @@ static int __init pcie_setup(struct pci_sys_data *sys)
/*
* IORESOURCE_IO
*/
- res[0].name = "PCI-EX I/O Space";
+ res[0].name = "PCIe I/O Space";
res[0].flags = IORESOURCE_IO;
res[0].start = ORION_PCIE_IO_BUS_BASE;
res[0].end = res[0].start + ORION_PCIE_IO_SIZE - 1;
if (request_resource(&ioport_resource, &res[0]))
- panic("Request PCIE IO resource failed\n");
+ panic("Request PCIe IO resource failed\n");
sys->resource[0] = &res[0];
/*
* IORESOURCE_MEM
*/
- res[1].name = "PCI-EX Memory Space";
+ res[1].name = "PCIe Memory Space";
res[1].flags = IORESOURCE_MEM;
res[1].start = ORION_PCIE_MEM_PHYS_BASE;
res[1].end = res[1].start + ORION_PCIE_MEM_SIZE - 1;
if (request_resource(&iomem_resource, &res[1]))
- panic("Request PCIE Memory resource failed\n");
+ panic("Request PCIe Memory resource failed\n");
sys->resource[1] = &res[1];
sys->resource[2] = NULL;
@@ -351,7 +351,7 @@ static int orion_pci_wr_conf(struct pci_bus *bus, u32 devfn,
PCI_FUNC(devfn), where, size, val);
}
-struct pci_ops pci_ops = {
+static struct pci_ops pci_ops = {
.read = orion_pci_rd_conf,
.write = orion_pci_wr_conf,
};
@@ -508,7 +508,7 @@ static int __init pci_setup(struct pci_sys_data *sys)
/*****************************************************************************
- * General PCIE + PCI
+ * General PCIe + PCI
****************************************************************************/
static void __devinit rc_pci_fixup(struct pci_dev *dev)
{
diff --git a/arch/arm/mach-orion/rd88f5182-setup.c b/arch/arm/mach-orion/rd88f5182-setup.c
index 662c097ca333..f3e38ecda1ce 100644
--- a/arch/arm/mach-orion/rd88f5182-setup.c
+++ b/arch/arm/mach-orion/rd88f5182-setup.c
@@ -5,8 +5,8 @@
*
* Maintainer: Ronen Shitrit <rshitrit@marvell.com>
*
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/