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| author | Chris Zankel <chris@zankel.net> | 2016-08-03 22:30:00 +0000 |
|---|---|---|
| committer | Chris Zankel <chris@zankel.net> | 2016-08-03 22:30:00 +0000 |
| commit | 9e8511ff7e3f18df7d202da06c9704d940fa68f9 (patch) | |
| tree | e6fe856effe9a41693d58b947b18e0345fe9dc9b /arch/xtensa/include/asm/pgtable.h | |
| parent | 523d939ef98fd712632d93a5a2b588e477a7565e (diff) | |
| parent | d8d2f7f64592f3e8c51dac6d20aed044dca4009a (diff) | |
| download | linux-9e8511ff7e3f18df7d202da06c9704d940fa68f9.tar.bz2 | |
Merge tag 'xtensa-for-next-20160731' of git://github.com/jcmvbkbc/linux-xtensa into for_next
Xtensa improvements for 4.8:
- add new kernel memory layouts for MMUv3 cores: with 256MB and 512MB
KSEG size, starting at physical address other than 0;
- make kernel load address configurable;
- clean up kernel memory layout macros;
- drop sysmem early allocator and switch to memblock;
- enable kmemleak and memory reservation from the device tree;
- wire up new syscalls: userfaultfd, membarrier, mlock2, copy_file_range,
preadv2 and pwritev2.
Diffstat (limited to 'arch/xtensa/include/asm/pgtable.h')
| -rw-r--r-- | arch/xtensa/include/asm/pgtable.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/xtensa/include/asm/pgtable.h b/arch/xtensa/include/asm/pgtable.h index fb02fdc5ecee..8aa0e0d9cbb2 100644 --- a/arch/xtensa/include/asm/pgtable.h +++ b/arch/xtensa/include/asm/pgtable.h @@ -13,6 +13,7 @@ #include <asm-generic/pgtable-nopmd.h> #include <asm/page.h> +#include <asm/kmem_layout.h> /* * We only use two ring levels, user and kernel space. @@ -68,9 +69,9 @@ * Virtual memory area. We keep a distance to other memory regions to be * on the safe side. We also use this area for cache aliasing. */ -#define VMALLOC_START 0xC0000000 -#define VMALLOC_END 0xC7FEFFFF -#define TLBTEMP_BASE_1 0xC7FF0000 +#define VMALLOC_START (XCHAL_KSEG_CACHED_VADDR - 0x10000000) +#define VMALLOC_END (VMALLOC_START + 0x07FEFFFF) +#define TLBTEMP_BASE_1 (VMALLOC_END + 1) #define TLBTEMP_BASE_2 (TLBTEMP_BASE_1 + DCACHE_WAY_SIZE) #if 2 * DCACHE_WAY_SIZE > ICACHE_WAY_SIZE #define TLBTEMP_SIZE (2 * DCACHE_WAY_SIZE) |