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author | Linus Torvalds <torvalds@linux-foundation.org> | 2022-05-06 11:42:58 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2022-05-06 11:42:58 -0700 |
commit | bce58da1f39843d47ccd6d9839fadbf898b72358 (patch) | |
tree | 6c5267ecd0133282be6e15ed832bbd785ef82f49 /arch/x86/pci | |
parent | 497fe3bb196de7249723ba1496fb72ca63ce14e2 (diff) | |
parent | 053d2290c0307e3642e75e0185ddadf084dc36c1 (diff) | |
download | linux-bce58da1f39843d47ccd6d9839fadbf898b72358.tar.bz2 |
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull kvm fixes from Paolo Bonzini:
"x86:
- Account for family 17h event renumberings in AMD PMU emulation
- Remove CPUID leaf 0xA on AMD processors
- Fix lockdep issue with locking all vCPUs
- Fix loss of A/D bits in SPTEs
- Fix syzkaller issue with invalid guest state"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: VMX: Exit to userspace if vCPU has injected exception and invalid state
KVM: SEV: Mark nested locking of vcpu->lock
kvm: x86/cpuid: Only provide CPUID leaf 0xA if host has architectural PMU
KVM: x86/svm: Account for family 17h event renumberings in amd_pmc_perf_hw_id
KVM: x86/mmu: Use atomic XCHG to write TDP MMU SPTEs with volatile bits
KVM: x86/mmu: Move shadow-present check out of spte_has_volatile_bits()
KVM: x86/mmu: Don't treat fully writable SPTEs as volatile (modulo A/D)
Diffstat (limited to 'arch/x86/pci')
0 files changed, 0 insertions, 0 deletions