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author | Aleksander Jan Bajkowski <olek2@wp.pl> | 2021-09-14 23:20:59 +0200 |
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committer | David S. Miller <davem@davemloft.net> | 2021-09-15 11:02:01 +0100 |
commit | 5ca9ce2ba4d5884cd94d1a856c675ab1242cd242 (patch) | |
tree | c38495d123de5f8091df4dc57eac9a2a2b3ced4e /arch/x86/mm/pat | |
parent | c12aa581f6d5e80c3c3675ab26a52c2b3b62f76e (diff) | |
download | linux-5ca9ce2ba4d5884cd94d1a856c675ab1242cd242.tar.bz2 |
MIPS: lantiq: dma: reset correct number of channel
Different SoCs have a different number of channels, e.g .:
* amazon-se has 10 channels,
* danube+ar9 have 20 channels,
* vr9 has 28 channels,
* ar10 has 24 channels.
We can read the ID register and, depending on the reported
number of channels, reset the appropriate number of channels.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/x86/mm/pat')
0 files changed, 0 insertions, 0 deletions