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authorLin Ming <ming.m.lin@intel.com>2010-03-18 18:33:07 +0800
committerIngo Molnar <mingo@elte.hu>2010-03-18 17:03:51 +0100
commitf34edbc1cdb0f8f83d94e1d668dd6e41abf0defb (patch)
treed57803bcc891a748551429d2feafec2df8007367 /arch/x86/include/asm/perf_event_p4.h
parent55632770d7298835645489828af87f854c47749c (diff)
downloadlinux-f34edbc1cdb0f8f83d94e1d668dd6e41abf0defb.tar.bz2
perf, x86: Add a key to simplify template lookup in Pentium-4 PMU
Currently, we use opcode(Event and Event-Selector) + emask to look up template in p4_templates. But cache events (L1-dcache-load-misses, LLC-load-misses, etc) use the same event(P4_REPLAY_EVENT) to do the counting, ie, they have the same opcode and emask. So we can not use current lookup mechanism to find the template for cache events. This patch introduces a "key", which is the index into p4_templates. The low 12 bits of CCCR are reserved, so we can hide the "key" in the low 12 bits of hwc->config. We extract the key from hwc->config and then quickly find the template. Signed-off-by: Lin Ming <ming.m.lin@intel.com> Reviewed-by: Cyrill Gorcunov <gorcunov@openvz.org> Cc: Peter Zijlstra <peterz@infradead.org> LKML-Reference: <1268908387.13901.127.camel@minggr.sh.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include/asm/perf_event_p4.h')
-rw-r--r--arch/x86/include/asm/perf_event_p4.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/x86/include/asm/perf_event_p4.h b/arch/x86/include/asm/perf_event_p4.h
index b842b3238e46..7d3406a2773c 100644
--- a/arch/x86/include/asm/perf_event_p4.h
+++ b/arch/x86/include/asm/perf_event_p4.h
@@ -65,6 +65,7 @@
#define P4_CCCR_THREAD_SINGLE 0x00010000U
#define P4_CCCR_THREAD_BOTH 0x00020000U
#define P4_CCCR_THREAD_ANY 0x00030000U
+#define P4_CCCR_RESERVED 0x00000fffU
/* Non HT mask */
#define P4_CCCR_MASK \
@@ -116,7 +117,7 @@
#define p4_config_pack_escr(v) (((u64)(v)) << 32)
#define p4_config_pack_cccr(v) (((u64)(v)) & 0xffffffffULL)
#define p4_config_unpack_escr(v) (((u64)(v)) >> 32)
-#define p4_config_unpack_cccr(v) (((u64)(v)) & 0xffffffffULL)
+#define p4_config_unpack_cccr(v) (((u64)(v)) & 0xfffff000ULL)
#define p4_config_unpack_emask(v) \
({ \
@@ -126,6 +127,8 @@
t; \
})
+#define p4_config_unpack_key(v) (((u64)(v)) & P4_CCCR_RESERVED)
+
#define P4_CONFIG_HT_SHIFT 63
#define P4_CONFIG_HT (1ULL << P4_CONFIG_HT_SHIFT)