diff options
| author | Kan Liang <kan.liang@linux.intel.com> | 2022-06-29 08:08:40 -0700 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2022-07-04 09:23:09 +0200 |
| commit | ccf170e9d8fdacfe435bbe3749c897c7d86d32f8 (patch) | |
| tree | 45c71b3ce764622ed8a5c2099c48fd8d9ea84aa8 /arch/x86/events/intel/core.c | |
| parent | 39a41278f041e4b7ee6c83caefac845c9b19fc61 (diff) | |
| download | linux-ccf170e9d8fdacfe435bbe3749c897c7d86d32f8.tar.bz2 | |
perf/x86/intel: Fix PEBS data source encoding for ADL
The PEBS data source encoding for the e-core is different from the
p-core.
Add the pebs_data_source[] in the struct x86_hybrid_pmu to store the
data source encoding for each type of the core.
Add intel_pmu_pebs_data_source_grt() for the e-core.
There is nothing changed for the data source encoding of the p-core,
which still reuse the intel_pmu_pebs_data_source_skl().
Fixes: f83d2f91d259 ("perf/x86/intel: Add Alder Lake Hybrid support")
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lkml.kernel.org/r/20220629150840.2235741-2-kan.liang@linux.intel.com
Diffstat (limited to 'arch/x86/events/intel/core.c')
| -rw-r--r-- | arch/x86/events/intel/core.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 07d4a5f20321..bd8b98857609 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -6241,7 +6241,7 @@ __init int intel_pmu_init(void) x86_pmu.flags |= PMU_FL_INSTR_LATENCY; x86_pmu.flags |= PMU_FL_MEM_LOADS_AUX; x86_pmu.lbr_pt_coexist = true; - intel_pmu_pebs_data_source_skl(false); + intel_pmu_pebs_data_source_adl(); x86_pmu.pebs_latency_data = adl_latency_data_small; x86_pmu.num_topdown_events = 8; x86_pmu.update_topdown_event = adl_update_topdown_event; |