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| author | Christoph Hellwig <hch@lst.de> | 2017-08-27 10:22:48 +0200 |
|---|---|---|
| committer | Christoph Hellwig <hch@lst.de> | 2017-10-19 16:37:36 +0200 |
| commit | a535bb801036268c3d057d7584e9c8f35f69aad4 (patch) | |
| tree | 1144504d22c937ce155a26a4a95bc4747c69665d /arch/unicore32/include/asm/cacheflush.h | |
| parent | 87f626348a7a4f9d21c321b6326492de9aef245f (diff) | |
| download | linux-a535bb801036268c3d057d7584e9c8f35f69aad4.tar.bz2 | |
unicore32: make dma_cache_sync a no-op
unicore32 does not implement DMA_ATTR_NON_CONSISTENT allocations, so it
doesn't make any sense to do any work in dma_cache_sync given that it
must be a no-op when dma_alloc_attrs returns coherent memory.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Diffstat (limited to 'arch/unicore32/include/asm/cacheflush.h')
| -rw-r--r-- | arch/unicore32/include/asm/cacheflush.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/unicore32/include/asm/cacheflush.h b/arch/unicore32/include/asm/cacheflush.h index c0301e6c8b81..a5e08e2d5d6d 100644 --- a/arch/unicore32/include/asm/cacheflush.h +++ b/arch/unicore32/include/asm/cacheflush.h @@ -102,15 +102,6 @@ extern void __cpuc_flush_dcache_area(void *, size_t); extern void __cpuc_flush_kern_dcache_area(void *addr, size_t size); /* - * These are private to the dma-mapping API. Do not use directly. - * Their sole purpose is to ensure that data held in the cache - * is visible to DMA, or data written by DMA to system memory is - * visible to the CPU. - */ -extern void __cpuc_dma_clean_range(unsigned long, unsigned long); -extern void __cpuc_dma_flush_range(unsigned long, unsigned long); - -/* * Copy user data from/to a page which is mapped into a different * processes address space. Really, we want to allow our "user * space" model to handle this. |