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authorPaul Mundt <lethal@linux-sh.org>2006-12-28 10:31:48 +0900
committerPaul Mundt <lethal@linux-sh.org>2007-02-13 10:54:44 +0900
commit26b7a78c55fbc0e23a7dc19e89fd50f200efc002 (patch)
treea830e70a57d4e9cbc669bc362db73ba5ace30d4d /arch/sh/mm/Kconfig
parent7a847f819063b80cc5b38d39e8aad4d60f6ca2fd (diff)
downloadlinux-26b7a78c55fbc0e23a7dc19e89fd50f200efc002.tar.bz2
sh: Lazy dcache writeback optimizations.
This converts the lazy dcache handling to the model described in Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a bonus, this slightly cuts down on the cache flushing frequency. With that and the PTEA handling out of the way, the update_mmu_cache() implementations can be consolidated, and we no longer have to worry about which configuration the cache is in for the SH7705 case. And finally, explicitly disable the lazy writeback on SMP (SH-4A). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/mm/Kconfig')
-rw-r--r--arch/sh/mm/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index fddf6680ec4f..28b5102e1cdc 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -20,7 +20,7 @@ config CPU_SH4
bool
select CPU_HAS_INTEVT
select CPU_HAS_SR_RB
- select CPU_HAS_PTEA if !CPU_SUBTYPE_ST40
+ select CPU_HAS_PTEA if (!CPU_SUBTYPE_ST40 && !CPU_SH4A) || CPU_SHX2
config CPU_SH4A
bool