Merge tag 'asoc-v6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next

ASoC: Updates for v6.2

This is a fairly sedate release for the core code, but there's been a
lot of driver work especially around the x86 platforms and device tree
updates:

 - More cleanups of the DAPM code from Morimoto-san.
 - Factoring out of mapping hw_params onto SoundWire configuration by
   Charles Keepax.
 - The ever ongoing overhauls of the Intel DSP code continue, including
   support for loading libraries and probes with IPC4 on SOF.
 - Support for more sample formats on JZ4740.
 - Lots of device tree conversions and fixups.
 - Support for Allwinner D1, a range of AMD and Intel systems, Mediatek
   systems with multiple DMICs, Nuvoton NAU8318, NXP fsl_rpmsg and
   i.MX93, Qualcomm AudioReach Enable, MFC and SAL, RealTek RT1318 and
   Rockchip RK3588

There's more cross tree updates than usual, though all fairly minor:

 - Some OMAP board file updates that were depedencies for removing their
   providers in ASoC, as part of a wider effort removing the support for
   the relevant OMAP platforms.
 - A new I2C API required for updates to the new I2C probe API.
 - A DRM update making use of a new API for fixing the capabilities
   advertised via hdmi-codec.

Since this is being sent early I might send some more stuff if you've
not yet sent your pull request and there's more come in.

1 files changed, 38 insertions, 0 deletions

diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c
index 6cb7d96ad9c7..57b40a350420 100644
--- a/arch/riscv/mm/cacheflush.c
+++ b/arch/riscv/mm/cacheflush.c
@@ -3,6 +3,7 @@
  * Copyright (C) 2017 SiFive
  */
 
+#include <linux/of.h>
 #include <asm/cacheflush.h>
 
 #ifdef CONFIG_SMP
@@ -86,3 +87,40 @@ void flush_icache_pte(pte_t pte)
 		flush_icache_all();
 }
 #endif /* CONFIG_MMU */
+
+unsigned int riscv_cbom_block_size;
+EXPORT_SYMBOL_GPL(riscv_cbom_block_size);
+
+void riscv_init_cbom_blocksize(void)
+{
+	struct device_node *node;
+	unsigned long cbom_hartid;
+	u32 val, probed_block_size;
+	int ret;
+
+	probed_block_size = 0;
+	for_each_of_cpu_node(node) {
+		unsigned long hartid;
+
+		ret = riscv_of_processor_hartid(node, &hartid);
+		if (ret)
+			continue;
+
+		/* set block-size for cbom extension if available */
+		ret = of_property_read_u32(node, "riscv,cbom-block-size", &val);
+		if (ret)
+			continue;
+
+		if (!probed_block_size) {
+			probed_block_size = val;
+			cbom_hartid = hartid;
+		} else {
+			if (probed_block_size != val)
+				pr_warn("cbom-block-size mismatched between harts %lu and %lu\n",
+					cbom_hartid, hartid);
+		}
+	}
+
+	if (probed_block_size)
+		riscv_cbom_block_size = probed_block_size;
+}