diff options
author | Atish Patra <atishp@rivosinc.com> | 2022-07-22 09:50:45 -0700 |
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committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-08-11 14:36:13 -0700 |
commit | 464b0187ff94fcc629fe7cd350e16a3b9e80ed9e (patch) | |
tree | 56b5a4be274df53a837dc3377d94cd21e30606c5 /arch/riscv/kernel/cpufeature.c | |
parent | bf952a290f7a9d818204b9b68e861655f8b15a65 (diff) | |
download | linux-464b0187ff94fcc629fe7cd350e16a3b9e80ed9e.tar.bz2 |
RISC-V: Enable sstc extension parsing from DT
The ISA extension framework now allows parsing any multi-letter
ISA extension.
Enable that for sstc extension.
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20220722165047.519994-3-atishp@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/kernel/cpufeature.c')
-rw-r--r-- | arch/riscv/kernel/cpufeature.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index a6f62a6d1edd..d1d83cd9fd4b 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -199,6 +199,7 @@ void __init riscv_fill_hwcap(void) } else { SET_ISA_EXT_MAP("sscofpmf", RISCV_ISA_EXT_SSCOFPMF); SET_ISA_EXT_MAP("svpbmt", RISCV_ISA_EXT_SVPBMT); + SET_ISA_EXT_MAP("sstc", RISCV_ISA_EXT_SSTC); } #undef SET_ISA_EXT_MAP } |