diff options
| author | Artem Bityutskiy <artem.bityutskiy@linux.intel.com> | 2022-07-26 18:29:35 +0300 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2022-07-28 14:37:41 -0400 |
| commit | 6287e6f0fdd36be4bbde6f539df6ea85eb2476c2 (patch) | |
| tree | 7f260eafa73258208ef253f96e48be057817421a /arch/riscv/configs | |
| parent | 0e4d42af81471ab801e059e1feac8e27547230cf (diff) | |
| download | linux-6287e6f0fdd36be4bbde6f539df6ea85eb2476c2.tar.bz2 | |
tools/power turbostat: do not decode ACC for ICX and SPR
The ACC (automatic C-state conversion) feature was available on Sky Lake and
Cascade Lake Xeons (SKX and CLX), but it is not available on Ice Lake and
Sapphire Rapids Xeons (ICX and SPR). Therefore, stop decoding it for ICX and
SPR.
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'arch/riscv/configs')
0 files changed, 0 insertions, 0 deletions