diff options
| author | Nick Hu <nickhu@andestech.com> | 2019-05-30 15:01:17 +0800 |
|---|---|---|
| committer | Paul Walmsley <paul.walmsley@sifive.com> | 2019-06-11 08:04:26 -0700 |
| commit | d0e1f2110a5eeb6e410b2dd37d98bc5b30da7bc7 (patch) | |
| tree | 9bfb7c63d1ea6a48b48a6bd222dc472835abf261 /arch/riscv/boot | |
| parent | 405945588feedac8d7609113de9c62e72575a0ef (diff) | |
| download | linux-d0e1f2110a5eeb6e410b2dd37d98bc5b30da7bc7.tar.bz2 | |
riscv: Fix udelay in RV32.
In RV32, udelay would delay the wrong cycle. When it shifts right
"UDELAY_SHIFT" bits, it either delays 0 cycle or 1 cycle. It only works
correctly in RV64. Because the 'ucycles' always needs to be 64 bits
variable.
Signed-off-by: Nick Hu <nickhu@andestech.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
[paul.walmsley@sifive.com: fixed minor spelling error]
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Diffstat (limited to 'arch/riscv/boot')
0 files changed, 0 insertions, 0 deletions