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| author | Gavin Shan <gwshan@linux.vnet.ibm.com> | 2015-06-19 12:26:17 +1000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2015-07-13 16:12:00 +1000 |
| commit | 96a2f92bf8a4d0bf4a49bdd6539561a2c3289f37 (patch) | |
| tree | ba3fbb6b804232b1b777a6a766adda8a05cbdf87 /arch/powerpc/platforms/powernv/pci.h | |
| parent | e9dc4d7f72a375020ecbc9ca35b098fd9018910b (diff) | |
| download | linux-96a2f92bf8a4d0bf4a49bdd6539561a2c3289f37.tar.bz2 | |
powerpc/powernv: Reserve M64 PEs based on BARs
On PHB3, some PEs might be reserved in advance to reflect the M64
segments consumed by those PEs. We're reserving PEs based on the
M64 window of root port, which might contain VF BAR. The PEs for
VFs are allocated dynamically, not reserved based on the consumed
M64 segments. So the M64 window of root port isn't reliable for
the task. Instead, we go through M64 BARs (VF BARs excluded) of
PCI devices under the specified root bus and reserve PEs accordingly,
as the patch does.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/platforms/powernv/pci.h')
| -rw-r--r-- | arch/powerpc/platforms/powernv/pci.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h index 8ef2d28aded0..c6ddd18841b4 100644 --- a/arch/powerpc/platforms/powernv/pci.h +++ b/arch/powerpc/platforms/powernv/pci.h @@ -110,7 +110,8 @@ struct pnv_phb { void (*fixup_phb)(struct pci_controller *hose); u32 (*bdfn_to_pe)(struct pnv_phb *phb, struct pci_bus *bus, u32 devfn); int (*init_m64)(struct pnv_phb *phb); - void (*reserve_m64_pe)(struct pnv_phb *phb); + void (*reserve_m64_pe)(struct pci_bus *bus, + unsigned long *pe_bitmap, bool all); int (*pick_m64_pe)(struct pnv_phb *phb, struct pci_bus *bus, int all); int (*get_pe_state)(struct pnv_phb *phb, int pe_no); void (*freeze_pe)(struct pnv_phb *phb, int pe_no); |