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authorGavin Shan <gwshan@linux.vnet.ibm.com>2016-05-03 15:41:28 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2016-05-11 21:54:19 +1000
commit69d733e72ddae1680ffd3b5c648ff31cb46d9cc9 (patch)
tree981d4dbb1446aad40de991a25e293420ba987a6d /arch/powerpc/platforms/powernv/pci.h
parent23e79425fe7caaa93ddcee18ac4c57069f0fb4b6 (diff)
downloadlinux-69d733e72ddae1680ffd3b5c648ff31cb46d9cc9.tar.bz2
powerpc/powernv: IO and M32 mapping based on PCI device resources
Currently, the IO and M32 segments are mapped to the corresponding PE based on the windows of the parent bridge of PE's primary bus. It's not going to work when the windows of root port or upstream port of the PCIe switch behind root port are extended to PHB's apertures in order to support hotplug in subsequent patch. This fixes the issue by mapping IO and M32 segments based on the resources of the PCI devices included in the PE, instead of the windows of the parent bridge of the PE's primary bus. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/platforms/powernv/pci.h')
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