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| author | Scott Wood <scottwood@freescale.com> | 2015-07-18 14:24:58 -0500 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2015-08-07 23:00:01 -0500 |
| commit | c60232029aee84f69da0e74aa6f6d249edbbc80b (patch) | |
| tree | f56c5b4928f84e47a308a8d4adf664d0d34e4839 /arch/powerpc/mm/fsl_booke_mmu.c | |
| parent | 0d61f0b3e222b588480e2ad1e85bb2ea57561c4b (diff) | |
| download | linux-c60232029aee84f69da0e74aa6f6d249edbbc80b.tar.bz2 | |
powerpc/fsl: Force coherent memory on e500mc derivatives
In CoreNet systems it is not allowed to mix M and non-M mappings to the
same memory, and coherent DMA accesses are considered to be M mappings
for this purpose. Ignoring this has been observed to cause hard
lockups in non-SMP kernels on e6500.
Furthermore, e6500 implements the LRAT (logical to real address table)
which allows KVM guests to control the WIMGE bits. This means that
KVM cannot force the M bit on the way it usually does, so the guest had
better set it itself.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/mm/fsl_booke_mmu.c')
| -rw-r--r-- | arch/powerpc/mm/fsl_booke_mmu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c index 9c90e66cffb6..354ba3c09ef3 100644 --- a/arch/powerpc/mm/fsl_booke_mmu.c +++ b/arch/powerpc/mm/fsl_booke_mmu.c @@ -112,7 +112,7 @@ static void settlbcam(int index, unsigned long virt, phys_addr_t phys, tsize = __ilog2(size) - 10; -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC) if ((flags & _PAGE_NO_CACHE) == 0) flags |= _PAGE_COHERENT; #endif |