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| author | Christophe Leroy <christophe.leroy@c-s.fr> | 2019-06-14 06:41:47 +0000 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2019-07-05 02:06:38 +1000 |
| commit | 43db76f41824aea0a31f817e69ad304a95cf068a (patch) | |
| tree | 4493604476c20c66799a9c444b8adc618f0c53de /arch/powerpc/boot | |
| parent | c3eec5d7da3f77c6e505b44241205ca0aff1df24 (diff) | |
| download | linux-43db76f41824aea0a31f817e69ad304a95cf068a.tar.bz2 | |
powerpc/8xx: Add microcode patch to move SMC parameter RAM.
Some SCC functions like the QMC requires an extended parameter RAM.
On modern 8xx (ie 866 and 885), SPI area can already be relocated,
allowing the use of those functions on SCC2. But SCC3 and SCC4
parameter RAM collide with SMC1 and SMC2 parameter RAMs.
This patch adds microcode to allow the relocation of both SMC1 and
SMC2, and relocate them at offsets 0x1ec0 and 0x1fc0.
Those offsets are by default for the CPM1 DSP1 and DSP2, but there
is no kernel driver using them at the moment so this area can be
reused.
This microcode is provided by Freescale/NXP in Engineering Bulletin
EB662 ("MPC8xx I2C/SPI and SMC Relocation Microcode Packages")
dated 2006. The binary code is public. The source is not available.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/boot')
0 files changed, 0 insertions, 0 deletions