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author | afzal mohammed <afzal.mohd.ma@gmail.com> | 2020-03-05 17:27:53 +0530 |
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committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-03-05 16:47:35 +0100 |
commit | ac8fd122e070ce0e60c608d4f085f7af77290844 (patch) | |
tree | 9bb3b192caccee46c2ea46b3a3a8d1bd8186039d /arch/mips/sni/pcit.c | |
parent | 792a402c2840054533ef56279c212ef6da87d811 (diff) | |
download | linux-ac8fd122e070ce0e60c608d4f085f7af77290844.tar.bz2 |
MIPS: Replace setup_irq() by request_irq()
request_irq() is preferred over setup_irq(). Invocations of setup_irq()
occur after memory allocators are ready.
Per tglx[1], setup_irq() existed in olden days when allocators were not
ready by the time early interrupts were initialized.
Hence replace setup_irq() by request_irq().
remove_irq() has been replaced by free_irq() as well.
There were build error's during previous version, couple of which was
reported by kbuild test robot <lkp@intel.com> of which one was reported
by Thomas Bogendoerfer <tsbogend@alpha.franken.de> as well. There were a
few more issues including build errors, those also have been fixed.
[1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos
Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/sni/pcit.c')
-rw-r--r-- | arch/mips/sni/pcit.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c index 05bb51676e82..4a850ab03398 100644 --- a/arch/mips/sni/pcit.c +++ b/arch/mips/sni/pcit.c @@ -244,7 +244,9 @@ void __init sni_pcit_irq_init(void) *(volatile u32 *)SNI_PCIT_INT_REG = 0; sni_hwint = sni_pcit_hwint; change_c0_status(ST0_IM, IE_IRQ1); - setup_irq(SNI_PCIT_INT_START + 6, &sni_isa_irq); + if (request_irq(SNI_PCIT_INT_START + 6, sni_isa_irq_handler, + IRQF_SHARED, "ISA", NULL)) + pr_err("Failed to register ISA interrupt\n"); } void __init sni_pcit_cplus_irq_init(void) @@ -257,7 +259,9 @@ void __init sni_pcit_cplus_irq_init(void) *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000; sni_hwint = sni_pcit_hwint_cplus; change_c0_status(ST0_IM, IE_IRQ0); - setup_irq(MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq); + if (request_irq(MIPS_CPU_IRQ_BASE + 3, sni_isa_irq_handler, + IRQF_SHARED, "ISA", NULL)) + pr_err("Failed to register ISA interrupt\n"); } void __init sni_pcit_init(void) |