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authorPurna Chandra Mandal <purna.mandal@microchip.com>2016-05-17 10:35:52 +0530
committerRalf Baechle <ralf@linux-mips.org>2016-05-17 11:22:51 +0200
commit6e4ad1b413604b9130bdbe532aafdbd47ff5318e (patch)
tree534e6d4b5d3a5689d7320742ae1e3036f10d07e7 /arch/mips/pic32/pic32mzda/time.c
parent9184dc8ffa56844352b3b9860e562ec4ee41176f (diff)
downloadlinux-6e4ad1b413604b9130bdbe532aafdbd47ff5318e.tar.bz2
MIPS: pic32mzda: fix getting timer clock rate.
PIC32 clock driver is now implemented as platform driver instead of as part of of_clk_init(). It meants all the clock modules are available quite late in the boot sequence. So request for CPU clock by clk_get_sys() and clk_get_rate() to find c0_timer rate fails. To fix this use PIC32 specific early clock functions implemented for early console support. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Joshua Henderson <digitalpeer@digitalpeer.com> Patchwork: https://patchwork.linux-mips.org/patch/13262/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pic32/pic32mzda/time.c')
-rw-r--r--arch/mips/pic32/pic32mzda/time.c13
1 files changed, 4 insertions, 9 deletions
diff --git a/arch/mips/pic32/pic32mzda/time.c b/arch/mips/pic32/pic32mzda/time.c
index ca6a62bb10db..62a0a78b6c64 100644
--- a/arch/mips/pic32/pic32mzda/time.c
+++ b/arch/mips/pic32/pic32mzda/time.c
@@ -11,13 +11,12 @@
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*/
-#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/clocksource.h>
#include <linux/init.h>
+#include <linux/irqdomain.h>
#include <linux/of.h>
#include <linux/of_irq.h>
-#include <linux/irqdomain.h>
#include <asm/time.h>
@@ -58,16 +57,12 @@ unsigned int get_c0_compare_int(void)
void __init plat_time_init(void)
{
- struct clk *clk;
+ unsigned long rate = pic32_get_pbclk(7);
of_clk_init(NULL);
- clk = clk_get_sys("cpu_clk", NULL);
- if (IS_ERR(clk))
- panic("unable to get CPU clock, err=%ld", PTR_ERR(clk));
- clk_prepare_enable(clk);
- pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
- mips_hpt_frequency = clk_get_rate(clk) / 2;
+ pr_info("CPU Clock: %ldMHz\n", rate / 1000000);
+ mips_hpt_frequency = rate / 2;
clocksource_probe();
}