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authorMaciej W. Rozycki <macro@linux-mips.org>2006-10-02 12:55:09 +0100
committerRalf Baechle <ralf@linux-mips.org>2006-10-03 17:59:17 +0100
commit15a1c5140436c5be7673a4709c5d7e1f3cd7bdd9 (patch)
tree0ec2b255917f916c072af27eeeb2b76d9d361ff9 /arch/mips/pci
parent3a42aa934856bfe3f28946f66ea8a5f056445747 (diff)
downloadlinux-15a1c5140436c5be7673a4709c5d7e1f3cd7bdd9.tar.bz2
[MIPS] BCM1250: TRDY timeout tweaks for Broadcom SiByte systems
It was obesrved that at least one older PCI card predating the requirement for the TRDY signal to respond within 16 clock ticks actually does not meet this rule nor even the power-on defaults of the PCI bridges found in development systems built around the Broadcom SiByte SOCs. Here is a patch that bumps up the timeout to the highest finite value supported by these chips, which is 255 clock ticks. The bridges affected are the SiByte SOC itself and the SP1011. This change does not effectively affect systems only having PCI option cards installed that meet the TRDY requirement of the current PCI spec. The rule was introduced with PCI 2.1, so any older card may make the system affected. If this is the case, performance of the system will suffer in return for the card working at all. If this is a concern, then the solution is not to use such cards. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> ---
Diffstat (limited to 'arch/mips/pci')
-rw-r--r--arch/mips/pci/fixup-sb1250.c23
1 files changed, 22 insertions, 1 deletions
diff --git a/arch/mips/pci/fixup-sb1250.c b/arch/mips/pci/fixup-sb1250.c
index 13791b78e598..7a7444874e80 100644
--- a/arch/mips/pci/fixup-sb1250.c
+++ b/arch/mips/pci/fixup-sb1250.c
@@ -1,7 +1,7 @@
/*
* arch/mips/pci/fixup-sb1250.c
*
- * Copyright (C) 2004 MIPS Technologies, Inc. All rights reserved.
+ * Copyright (C) 2004, 2006 MIPS Technologies, Inc. All rights reserved.
* Author: Maciej W. Rozycki <macro@mips.com>
*
* This program is free software; you can redistribute it and/or
@@ -14,6 +14,17 @@
#include <linux/pci.h>
/*
+ * Set the the BCM1250, etc. PCI host bridge's TRDY timeout
+ * to the finite max.
+ */
+static void __init quirk_sb1250_pci(struct pci_dev *dev)
+{
+ pci_write_config_byte(dev, 0x40, 0xff);
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIBYTE, PCI_DEVICE_ID_BCM1250_PCI,
+ quirk_sb1250_pci);
+
+/*
* The BCM1250, etc. PCI/HT bridge reports as a host bridge.
*/
static void __init quirk_sb1250_ht(struct pci_dev *dev)
@@ -22,3 +33,13 @@ static void __init quirk_sb1250_ht(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIBYTE, PCI_DEVICE_ID_BCM1250_HT,
quirk_sb1250_ht);
+
+/*
+ * Set the the SP1011 HT/PCI bridge's TRDY timeout to the finite max.
+ */
+static void __init quirk_sp1011(struct pci_dev *dev)
+{
+ pci_write_config_byte(dev, 0x64, 0xff);
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIPACKETS, PCI_DEVICE_ID_SP1011,
+ quirk_sp1011);