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author | Ralf Baechle <ralf@linux-mips.org> | 2012-12-11 21:02:55 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2012-12-13 18:15:30 +0100 |
commit | bdf20507da11a9a5b32ef04fa09f352828189aef (patch) | |
tree | 5fe9541a1b0dfe9628cd3fff26d6ac43de1206a9 /arch/mips/mm/tlbex.c | |
parent | fa4dbbc602a1fb020b627ca8d5a265ad7f3d0c48 (diff) | |
download | linux-bdf20507da11a9a5b32ef04fa09f352828189aef.tar.bz2 |
MIPS: PMC-Sierra Yosemite: Remove support.
Nobody seems to be interested anymore and upstream also never had an
ethernet driver.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/tlbex.c')
-rw-r--r-- | arch/mips/mm/tlbex.c | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 6af62a2fec21..69a357254e46 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -603,24 +603,6 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l, tlbw(p); break; - case CPU_RM9000: - /* - * When the JTLB is updated by tlbwi or tlbwr, a subsequent - * use of the JTLB for instructions should not occur for 4 - * cpu cycles and use for data translations should not occur - * for 3 cpu cycles. - */ - uasm_i_ssnop(p); - uasm_i_ssnop(p); - uasm_i_ssnop(p); - uasm_i_ssnop(p); - tlbw(p); - uasm_i_ssnop(p); - uasm_i_ssnop(p); - uasm_i_ssnop(p); - uasm_i_ssnop(p); - break; - case CPU_VR4111: case CPU_VR4121: case CPU_VR4122: |