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| author | peter fuerst <post@pfrst.de> | 2009-05-17 23:49:45 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2009-05-20 18:53:13 +0100 |
| commit | 195d1a96ae5fdfbedb8dc4b97afee578921fa99e (patch) | |
| tree | f4b258b69a1f1132d958ea23e6097e7b0609ad3d /arch/mips/mm/tlb-r3k.c | |
| parent | 7e9e05cad94217498e4d9bd6ef7137b4e9e7ed64 (diff) | |
| download | linux-195d1a96ae5fdfbedb8dc4b97afee578921fa99e.tar.bz2 | |
MIPS: IP28: Change to build with -mr10k-cache-barrier=store
Richard Sandiford's new code for inserting the cache-barriers, for GCC
4.3 and above and already incorporated in the current GCC-release, uses
a slightly different option-syntax.
Signed-off-by: peter fuerst <post@pfrst.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/tlb-r3k.c')
0 files changed, 0 insertions, 0 deletions