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authorPaul Burton <paul.burton@imgtec.com>2016-08-19 18:18:26 +0100
committerRalf Baechle <ralf@linux-mips.org>2016-09-29 18:59:49 +0200
commit72c70f010dfcc9ea6cc13500602a29e33748452f (patch)
treec891259ef4181e3ebac3fc2bf7b9a85034cdc9ce /arch/mips/kernel
parent3021773c7c3e75e20b693931a19362681e744ea9 (diff)
downloadlinux-72c70f010dfcc9ea6cc13500602a29e33748452f.tar.bz2
MIPS: Stop setting I6400 FTLBP
The FTLBP field in Config7 for the I6400 is intended as chicken bits for debugging rather than as a field that software actually makes use of. For best performance, FTLBP should be left at its default value of 0 with all TLB writes hitting the FTLB by default. Additionally, since set_ftlb_enable is called from decode_configs before decode_config4 which determines the size of the TLBs, this was previously always setting FTLBP=3 for a 3:1 FTLB:VTLB write ratio which makes abysmal use of the available FTLB resources. This effectively reverts b0c4e1b79d8a ("MIPS: Set up FTLB probability for I6400"). Signed-off-by: Paul Burton <paul.burton@imgtec.com> Fixes: b0c4e1b79d8a ("MIPS: Set up FTLB probability for I6400") Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14021/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/cpu-probe.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index a88d44247cc8..ae290506873b 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -555,13 +555,8 @@ static int set_ftlb_enable(struct cpuinfo_mips *c, int enable)
write_c0_config6(config & ~MIPS_CONF6_FTLBEN);
break;
case CPU_I6400:
- /* I6400 & related cores use Config7 to configure FTLB */
- config = read_c0_config7();
- /* Clear the old probability value */
- config &= ~(3 << MIPS_CONF7_FTLBP_SHIFT);
- write_c0_config7(config | (calculate_ftlb_probability(c)
- << MIPS_CONF7_FTLBP_SHIFT));
- break;
+ /* There's no way to disable the FTLB */
+ return !enable;
case CPU_LOONGSON3:
/* Flush ITLB, DTLB, VTLB and FTLB */
write_c0_diag(LOONGSON_DIAG_ITLB | LOONGSON_DIAG_DTLB |