Merge tag 'mips_4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Paul Burton:
 "Here's the main MIPS pull for Linux 4.21. Core architecture changes
  include:

   - Syscall tables & definitions for unistd.h are now generated by
     scripts, providing greater consistency with other architectures &
     making it easier to add new syscalls.

   - Support for building kernels with no floating point support, upon
     which any userland attempting to use floating point instructions
     will receive a SIGILL. Mostly useful to shrink the kernel & as
     preparation for nanoMIPS support which does not yet include FP.

   - MIPS SIMD Architecture (MSA) vector register context is now exposed
     by ptrace via a new NT_MIPS_MSA regset.

   - ASIDs are now stored as 64b values even for MIPS32 kernels,
     expanding the ASID version field sufficiently that we don't need to
     worry about overflow & avoiding rare issues with reused ASIDs that
     have been observed in the wild.

   - The branch delay slot "emulation" page is now mapped without write
     permission for the user, preventing its use as a nice location for
     attacks to execute malicious code from.

   - Support for ioremap_prot(), primarily to allow gdb or other ptrace
     users the ability to view their tracee's memory using the same
     cache coherency attribute.

   - Optimizations to more cpu_has_* macros, allowing more to be
     compile-time constant where possible.

   - Enable building the whole kernel with UBSAN instrumentation.

   - Enable building the kernel with link-time dead code & data
     elimination.

  Platform specific changes include:

   - The Boston board gains a workaround for DMA prefetching issues with
     the EG20T Platform Controller Hub that it uses.

   - Cleanups to Cavium Octeon code removing about 20k lines of
     redundant code, mostly unused or duplicate register definitions in
     headers.

   - defconfig updates for the DECstation machines, including new
     defconfigs for r4k & 64b machines.

   - Further work on Loongson 3 support.

   - DMA fixes for SiByte machines"

* tag 'mips_4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (95 commits)
  MIPS: math-emu: Write-protect delay slot emulation pages
  MIPS: Remove struct mm_context_t fp_mode_switching field
  mips: generate uapi header and system call table files
  mips: add system call table generation support
  mips: remove syscall table entries
  mips: add +1 to __NR_syscalls in uapi header
  mips: rename scall64-64.S to scall64-n64.S
  mips: remove unused macros
  mips: add __NR_syscalls along with __NR_Linux_syscalls
  MIPS: Expand MIPS32 ASIDs to 64 bits
  MIPS: OCTEON: delete redundant register definitions
  MIPS: OCTEON: cvmx_gmxx_inf_mode: use oldest forward compatible definition
  MIPS: OCTEON: cvmx_mio_fus_dat3: use oldest forward compatible definition
  MIPS: OCTEON: cvmx_pko_mem_debug8: use oldest forward compatible definition
  MIPS: OCTEON: octeon-usb: use common gpio_bit definition
  MIPS: OCTEON: enable all OCTEON drivers in defconfig
  mips: annotate implicit fall throughs
  MIPS: Hardcode cpu_has_mips* where target ISA allows
  MIPS: MT: Remove norps command line parameter
  MIPS: Only include mmzone.h when CONFIG_NEED_MULTIPLE_NODES=y
  ...

1 files changed, 13 insertions, 0 deletions

diff --git a/arch/mips/kernel/watch.c b/arch/mips/kernel/watch.c
index 0e61a5b7647f..ba73b4077668 100644
--- a/arch/mips/kernel/watch.c
+++ b/arch/mips/kernel/watch.c
@@ -27,12 +27,15 @@ void mips_install_watch_registers(struct task_struct *t)
 	case 4:
 		write_c0_watchlo3(watches->watchlo[3]);
 		write_c0_watchhi3(watchhi | watches->watchhi[3]);
+		/* fall through */
 	case 3:
 		write_c0_watchlo2(watches->watchlo[2]);
 		write_c0_watchhi2(watchhi | watches->watchhi[2]);
+		/* fall through */
 	case 2:
 		write_c0_watchlo1(watches->watchlo[1]);
 		write_c0_watchhi1(watchhi | watches->watchhi[1]);
+		/* fall through */
 	case 1:
 		write_c0_watchlo0(watches->watchlo[0]);
 		write_c0_watchhi0(watchhi | watches->watchhi[0]);
@@ -55,10 +58,13 @@ void mips_read_watch_registers(void)
 		BUG();
 	case 4:
 		watches->watchhi[3] = (read_c0_watchhi3() & watchhi_mask);
+		/* fall through */
 	case 3:
 		watches->watchhi[2] = (read_c0_watchhi2() & watchhi_mask);
+		/* fall through */
 	case 2:
 		watches->watchhi[1] = (read_c0_watchhi1() & watchhi_mask);
+		/* fall through */
 	case 1:
 		watches->watchhi[0] = (read_c0_watchhi0() & watchhi_mask);
 	}
@@ -85,18 +91,25 @@ void mips_clear_watch_registers(void)
 		BUG();
 	case 8:
 		write_c0_watchlo7(0);
+		/* fall through */
 	case 7:
 		write_c0_watchlo6(0);
+		/* fall through */
 	case 6:
 		write_c0_watchlo5(0);
+		/* fall through */
 	case 5:
 		write_c0_watchlo4(0);
+		/* fall through */
 	case 4:
 		write_c0_watchlo3(0);
+		/* fall through */
 	case 3:
 		write_c0_watchlo2(0);
+		/* fall through */
 	case 2:
 		write_c0_watchlo1(0);
+		/* fall through */
 	case 1:
 		write_c0_watchlo0(0);
 	}