diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2014-01-15 10:31:53 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-26 23:00:12 +0100 |
| commit | 0ee958e102b62b418c2fb46c3439d4262067a5fc (patch) | |
| tree | e69192dc3112657cdde015ea8a43594a41a24d89 /arch/mips/kernel/asm-offsets.c | |
| parent | b86c2247a20f5d8b6f2b3bd0dfd2c9c8c6908b5e (diff) | |
| download | linux-0ee958e102b62b418c2fb46c3439d4262067a5fc.tar.bz2 | |
MIPS: Coherent Processing System SMP implementation
This patch introduces a new SMP implementation for systems implementing
the MIPS Coherent Processing System architecture. The kernel will make
use of the Coherence Manager, Cluster Power Controller & Global
Interrupt Controller in order to detect, bring up & make use of other
cores in the system. SMTC is not supported, so only a single TC per VPE
in the system is used. That is, this option enables an SMVP style setup
but across multiple cores.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6362/
Patchwork: https://patchwork.linux-mips.org/patch/6611/
Patchwork: https://patchwork.linux-mips.org/patch/6651/
Patchwork: https://patchwork.linux-mips.org/patch/6652/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/asm-offsets.c')
| -rw-r--r-- | arch/mips/kernel/asm-offsets.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index 0c2e853c3db4..8a2a45d4b147 100644 --- a/arch/mips/kernel/asm-offsets.c +++ b/arch/mips/kernel/asm-offsets.c @@ -16,6 +16,7 @@ #include <linux/suspend.h> #include <asm/ptrace.h> #include <asm/processor.h> +#include <asm/smp-cps.h> #include <linux/kvm_host.h> @@ -397,3 +398,15 @@ void output_kvm_defines(void) OFFSET(COP0_STATUS, mips_coproc, reg[MIPS_CP0_STATUS][0]); BLANK(); } + +#ifdef CONFIG_MIPS_CPS +void output_cps_defines(void) +{ + COMMENT(" MIPS CPS offsets. "); + OFFSET(BOOTCFG_CORE, boot_config, core); + OFFSET(BOOTCFG_VPE, boot_config, vpe); + OFFSET(BOOTCFG_PC, boot_config, pc); + OFFSET(BOOTCFG_SP, boot_config, sp); + OFFSET(BOOTCFG_GP, boot_config, gp); +} +#endif |