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authorDavid Daney <ddaney@caviumnetworks.com>2010-10-01 13:27:34 -0700
committerRalf Baechle <ralf@linux-mips.org>2010-10-29 19:08:32 +0100
commitb93b2abce497873be97d765b848e0a955d29f200 (patch)
tree0372a9162b8bbf67f5a5f7367a1da2001ea0292c /arch/mips/include/asm/octeon/cvmx-pescx-defs.h
parentee71b7d2f834d5e4b3a43001b2fa88743ed71a2c (diff)
downloadlinux-b93b2abce497873be97d765b848e0a955d29f200.tar.bz2
MIPS: Octeon: Rewrite DMA mapping functions.
All Octeon chips can support more than 4GB of RAM. Also due to how Octeon PCI is setup, even some configurations with less than 4GB of RAM will have portions that are not accessible from 32-bit devices. Enable the swiotlb code to handle the cases where a device cannot directly do DMA. This is a complete rewrite of the Octeon DMA mapping code. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1639/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/octeon/cvmx-pescx-defs.h')
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