diff options
| author | Hauke Mehrtens <hauke@hauke-m.de> | 2019-01-06 19:44:12 +0100 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2019-01-07 13:38:35 -0800 |
| commit | 390d1b461eec4b15aed78df0ce72a5c4bc40d619 (patch) | |
| tree | 6dcb1e3447d30db757291cb23edb2713a1d961e6 /arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h | |
| parent | 2b4dba55b04b212a7fd1f0395b41d79ee3a9801b (diff) | |
| download | linux-390d1b461eec4b15aed78df0ce72a5c4bc40d619.tar.bz2 | |
MIPS: lantiq: Use CP0_LEGACY_COMPARE_IRQ
Instead of using the lantiq specific MIPS_CPU_TIMER_IRQ use the generic
CP0_LEGACY_COMPARE_IRQ constant for the timer interrupt number.
MIPS_CPU_TIMER_IRQ was already defined to 7 for both supported SoC
families.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: jhogan@kernel.org
Cc: ralf@linux-mips.org
Cc: john@phrozen.org
Cc: linux-mips@linux-mips.org
Cc: linux-mips@vger.kernel.org
Diffstat (limited to 'arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h')
| -rw-r--r-- | arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h index 141076325307..0b424214a5e9 100644 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h @@ -19,8 +19,6 @@ #define LTQ_DMA_CH0_INT (INT_NUM_IM2_IRL0) -#define MIPS_CPU_TIMER_IRQ 7 - #define MAX_IM 5 #endif |