diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2017-06-02 12:39:04 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2017-06-28 12:22:39 +0200 |
| commit | 859aeb1b0dd1b9c6ff3d78f6cb913a73af9da247 (patch) | |
| tree | f3d28bf9dc8fe6a93c431f3091c3cc5c6f616e3e /arch/mips/include/asm/cpu.h | |
| parent | 498e9ade6593887397844eb8ac9d811252f7239e (diff) | |
| download | linux-859aeb1b0dd1b9c6ff3d78f6cb913a73af9da247.tar.bz2 | |
MIPS: Probe the I6500 CPU
Introduce the I6500 PRID & probe it just the same way as I6400. The MIPS
I6500 is the latest in Imagination Technologies' I-Class range of CPUs,
with a focus on scalability & heterogeneity. It introduces the notion of
multiple clusters to the MIPS Coherent Processing System, allowing for a
far higher total number of cores & threads in a system when compared
with its predecessors. Clusters don't need to be identical, and may
contain differing numbers of cores & IOCUs, or cores with differing
properties.
This patch alone adds the basic support for booting Linux on an I6500
CPU without support for any of its new functionality, for which support
will be introduced in further patches.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16190/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/cpu.h')
| -rw-r--r-- | arch/mips/include/asm/cpu.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 98f59307e6a3..3069359b0120 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -124,6 +124,7 @@ #define PRID_IMP_P5600 0xa800 #define PRID_IMP_I6400 0xa900 #define PRID_IMP_M6250 0xab00 +#define PRID_IMP_I6500 0xb000 /* * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE @@ -322,7 +323,7 @@ enum cpu_type_enum { */ CPU_5KC, CPU_5KE, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2, CPU_LOONGSON3, CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, - CPU_CAVIUM_OCTEON2, CPU_CAVIUM_OCTEON3, CPU_XLR, CPU_XLP, + CPU_CAVIUM_OCTEON2, CPU_CAVIUM_OCTEON3, CPU_XLR, CPU_XLP, CPU_I6500, CPU_QEMU_GENERIC, |