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| author | Paul Cercueil <paul@crapouillou.net> | 2020-07-30 18:12:33 +0200 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-07-31 17:48:57 +0200 |
| commit | 48f5dd56cf2980ff932c6fd98ff5a2c503cde97b (patch) | |
| tree | 80d887f17cfe6baf863dae364706dbbba6f7da7e /arch/mips/include/asm/cpu.h | |
| parent | 714b649dc7123c23f5082e8d11d2b81acf5b7a78 (diff) | |
| download | linux-48f5dd56cf2980ff932c6fd98ff5a2c503cde97b.tar.bz2 | |
MIPS: ingenic: Hardcode mem size for qi,lb60 board
Old Device Tree for the qi,lb60 (aka. Ben Nanonote) did not have a
'memory' node. The kernel would then read the memory controller
registers to know how much RAM was available.
Since every other supported board has had a 'memory' node from the
beginning, we can just hardcode a RAM size of 32 MiB when running with
an old Device Tree without the 'memory' node.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include/asm/cpu.h')
0 files changed, 0 insertions, 0 deletions