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authorIngo Molnar <mingo@elte.hu>2009-05-18 10:15:09 +0200
committerIngo Molnar <mingo@elte.hu>2009-05-18 10:15:35 +0200
commit1079cac0f4eb7d968395378b1625979d4c818dd6 (patch)
treed261058d95d27fe7250511d5fad69db30dc17731 /arch/mips/include/asm/cpu-features.h
parent5872144f64b34a5942f6b4acedc90b02de72c58b (diff)
parent1406de8e11eb043681297adf86d6892ff8efc27a (diff)
downloadlinux-1079cac0f4eb7d968395378b1625979d4c818dd6.tar.bz2
Merge commit 'v2.6.30-rc6' into tracing/core
Merge reason: we were on an -rc4 base, sync up to -rc6 Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/mips/include/asm/cpu-features.h')
-rw-r--r--arch/mips/include/asm/cpu-features.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index a0d14f85b781..c0047f861337 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -147,6 +147,15 @@
#define cpu_has_mips_r (cpu_has_mips32r1 | cpu_has_mips32r2 | \
cpu_has_mips64r1 | cpu_has_mips64r2)
+/*
+ * MIPS32, MIPS64, VR5500, IDT32332, IDT32334 and maybe a few other
+ * pre-MIPS32/MIPS53 processors have CLO, CLZ. For 64-bit kernels
+ * cpu_has_clo_clz also indicates the availability of DCLO and DCLZ.
+ */
+# ifndef cpu_has_clo_clz
+# define cpu_has_clo_clz cpu_has_mips_r
+# endif
+
#ifndef cpu_has_dsp
#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
#endif