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authorDavid Daney <ddaney@caviumnetworks.com>2008-12-10 08:37:25 -0800
committerRalf Baechle <ralf@linux-mips.org>2008-12-12 18:12:23 +0000
commitb6354db5bbbc538bf009cae6c019810b4a3ef21d (patch)
tree589a0f8d25879e2eb1c1a2c14b9b366e2a126950 /arch/mips/include/asm/asmmacro.h
parent6c34bc2976b30dc8b56392c020e25bae1f363cab (diff)
downloadlinux-b6354db5bbbc538bf009cae6c019810b4a3ef21d.tar.bz2
MIPS: Use EI/DI for MIPS R2.
For MIPS R2, use the EI and DI instructions to enable and disable interrupts. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/asmmacro.h')
-rw-r--r--arch/mips/include/asm/asmmacro.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index 7a881755800f..6c8342ae74db 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -35,6 +35,16 @@
mtc0 \reg, CP0_TCSTATUS
_ehb
.endm
+#elif defined(CONFIG_CPU_MIPSR2)
+ .macro local_irq_enable reg=t0
+ ei
+ irq_enable_hazard
+ .endm
+
+ .macro local_irq_disable reg=t0
+ di
+ irq_disable_hazard
+ .endm
#else
.macro local_irq_enable reg=t0
mfc0 \reg, CP0_STATUS