diff options
author | Andrew Bresticker <abrestic@chromium.org> | 2014-12-25 09:48:57 -0800 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2015-04-01 17:21:34 +0200 |
commit | 8c0b9ee8665c43ee370108930ff51cab9a545c1c (patch) | |
tree | aa6bd64b02f384db1e2a1cfbdd1ad08388980a71 /arch/mips/boot/dts/mti | |
parent | ec9ddad3c6a5789373e4f67009a0dea276febc47 (diff) | |
download | linux-8c0b9ee8665c43ee370108930ff51cab9a545c1c.tar.bz2 |
MIPS: Move device-trees into vendor sub-directories
Move the MIPS device-trees into the appropriate vendor sub-directories.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Tested-by: Kevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: jaedon.shin@gmail.com
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: jogo@openwrt.org
Cc: arnd@arndb.de
Cc: computersforpeace@gmail.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8835/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/boot/dts/mti')
-rw-r--r-- | arch/mips/boot/dts/mti/Makefile | 9 | ||||
-rw-r--r-- | arch/mips/boot/dts/mti/sead3.dts | 22 |
2 files changed, 31 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/mti/Makefile b/arch/mips/boot/dts/mti/Makefile new file mode 100644 index 000000000000..ef1f3dbed033 --- /dev/null +++ b/arch/mips/boot/dts/mti/Makefile @@ -0,0 +1,9 @@ +dtb-$(CONFIG_MIPS_SEAD3) += sead3.dtb + +obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y)) + +# Force kbuild to make empty built-in.o if necessary +obj- += dummy.o + +always := $(dtb-y) +clean-files := *.dtb *.dtb.S diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts new file mode 100644 index 000000000000..e4b317d414f1 --- /dev/null +++ b/arch/mips/boot/dts/mti/sead3.dts @@ -0,0 +1,22 @@ +/dts-v1/; + +/memreserve/ 0x00000000 0x00001000; // reserved +/memreserve/ 0x00001000 0x000ef000; // ROM data +/memreserve/ 0x000f0000 0x004cc000; // reserved + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mti,sead-3"; + + cpus { + cpu@0 { + compatible = "mti,mips14KEc", "mti,mips14Kc"; + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; |