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authorArnd Bergmann <arnd@arndb.de>2018-03-07 21:21:59 +0100
committerArnd Bergmann <arnd@arndb.de>2018-03-09 23:19:58 +0100
commitfd8773f9f544955f6f47dc2ac3ab85ad64376b7f (patch)
tree2eedaf10b5a4b62df0d3b514cec9614a6af6b563 /arch/frv/lib/__muldi3.S
parent739d875dd6982618020d30f58f8acf10f6076e6d (diff)
downloadlinux-fd8773f9f544955f6f47dc2ac3ab85ad64376b7f.tar.bz2
arch: remove frv port
The Fujitsu FRV kernel port has been around for a long time, but has not seen regular updates in several years and instead was marked 'Orphaned' in 2016 by long-time maintainer David Howells. The SoC product line apparently is apparently still around in the form of the Socionext Milbeaut image processor, but this one no longer uses the FRV CPU cores. This removes all FRV specific files from the kernel. Link: http://www.socionext.com/en/products/assp/milbeaut/ Cc: David Howells <dhowells@redhat.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/frv/lib/__muldi3.S')
-rw-r--r--arch/frv/lib/__muldi3.S32
1 files changed, 0 insertions, 32 deletions
diff --git a/arch/frv/lib/__muldi3.S b/arch/frv/lib/__muldi3.S
deleted file mode 100644
index 2703d9b79361..000000000000
--- a/arch/frv/lib/__muldi3.S
+++ /dev/null
@@ -1,32 +0,0 @@
-/* __muldi3.S: 64-bit multiply
- *
- * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells (dhowells@redhat.com)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
- .text
- .p2align 4
-
-###############################################################################
-#
-# unsigned long long __muldi3(unsigned long long x [GR8:GR9],
-# unsigned long long y [GR10:GR11])
-#
-###############################################################################
- .globl __muldi3, __mulll, __umulll
- .type __muldi3,@function
-__muldi3:
-__mulll:
-__umulll:
- umul gr8,gr11,gr4 ; GR4:GR5 = x.MSW * y.LSW
- umul gr9,gr10,gr6 ; GR6:GR7 = x.LSW * y.MSW
- umul.p gr9,gr11,gr8 ; GR8:GR9 = x.LSW * y.LSW
- add gr5,gr7,gr5
- add.p gr8,gr5,gr8 ; GR8 += GR5 + GR7
- bralr
- .size __muldi3, .-__muldi3