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author | Guo Ren <guoren@linux.alibaba.com> | 2020-12-24 00:12:06 +0000 |
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committer | Guo Ren <guoren@linux.alibaba.com> | 2021-01-12 09:52:40 +0800 |
commit | 7b513cf2bfdcdb7ba3f2b6e83f0e17e0793825d7 (patch) | |
tree | fc41dd4b7048e1b566c1184cf063e40c42cea941 /arch/csky/mm/init.c | |
parent | 8e35ac734fe2a1a225143d6375f9678f1850585c (diff) | |
download | linux-7b513cf2bfdcdb7ba3f2b6e83f0e17e0793825d7.tar.bz2 |
csky: Fixup PTE global for 2.5:1.5 virtual memory
Fixup commit c2d1adfa9a24 "csky: Add memory layout 2.5G(user):1.5G
(kernel)". That patch broke the global bit in PTE.
C-SKY TLB's entry contain two pages:
vpn, vpn + 1 -> ppn0, ppn1
All PPN's attributes contain global bit and final global is PPN0.G
& PPN1.G. So we must keep PPN0.G and PPN1.G same in one TLB's
entry.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Diffstat (limited to 'arch/csky/mm/init.c')
-rw-r--r-- | arch/csky/mm/init.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/csky/mm/init.c b/arch/csky/mm/init.c index 7742f1441a67..8170d7ce116b 100644 --- a/arch/csky/mm/init.c +++ b/arch/csky/mm/init.c @@ -30,9 +30,12 @@ #include <asm/tlb.h> #include <asm/cacheflush.h> +#define PTRS_KERN_TABLE \ + ((PTRS_PER_PGD - USER_PTRS_PER_PGD) * PTRS_PER_PTE) + pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned_bss; pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss; -pte_t kernel_pte_tables[(PTRS_PER_PGD - USER_PTRS_PER_PGD)*PTRS_PER_PTE] __page_aligned_bss; +pte_t kernel_pte_tables[PTRS_KERN_TABLE] __page_aligned_bss; EXPORT_SYMBOL(invalid_pte_table); unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] @@ -149,6 +152,9 @@ void __init mmu_init(unsigned long min_pfn, unsigned long max_pfn) swapper_pg_dir[i].pgd = __pa(kernel_pte_tables + (PTRS_PER_PTE * (i - USER_PTRS_PER_PGD))); + for (i = 0; i < PTRS_KERN_TABLE; i++) + set_pte(&kernel_pte_tables[i], __pte(_PAGE_GLOBAL)); + for (i = min_pfn; i < max_pfn; i++) set_pte(&kernel_pte_tables[i - PFN_DOWN(va_pa_offset)], pfn_pte(i, PAGE_KERNEL)); |