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authorMike Frysinger <vapier@gentoo.org>2009-12-12 14:27:40 +0000
committerMike Frysinger <vapier@gentoo.org>2009-12-15 00:16:54 -0500
commita797a0e242b94548af8b41e6454349b515b66eca (patch)
treeaebdc9dd3119c491984cc163e2146526bc87f825 /arch/blackfin
parent0a68b5341de1d80cf0ec8e6c9a851e4bfd99787c (diff)
downloadlinux-a797a0e242b94548af8b41e6454349b515b66eca.tar.bz2
Blackfin: NOMPU: skip DMA ICPLB hole when it is redundant
Normally there is no user-reserved memory after the DMA region which means there is no user-reserved ICPLB coverage. So the DMA hole can be covered by the large hole that is always added to cover up to the async bank. We only need an explicit DMA whole when we also add an explicit mapping for the user-reserved memory. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/kernel/cplb-nompu/cplbinit.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index c9b0a4d53dc1..282a7919821b 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -147,12 +147,13 @@ void __init generate_cplb_tables_all(void)
/* Normal RAM, including MTD FS. */
icplb_bounds[i_i].eaddr = uncached_end;
icplb_bounds[i_i++].data = SDRAM_IGENERIC;
- /* DMA uncached region. */
- if (DMA_UNCACHED_REGION) {
- icplb_bounds[i_i].eaddr = _ramend;
- icplb_bounds[i_i++].data = 0;
- }
if (_ramend != physical_mem_end) {
+ /* DMA uncached region. */
+ if (DMA_UNCACHED_REGION) {
+ /* Normally this hole is caught by the async below. */
+ icplb_bounds[i_i].eaddr = _ramend;
+ icplb_bounds[i_i++].data = 0;
+ }
/* Reserved memory. */
icplb_bounds[i_i].eaddr = physical_mem_end;
icplb_bounds[i_i++].data = (reserved_mem_icache_on ?