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authorScott Jiang <scott.jiang.linux@gmail.com>2013-07-03 16:48:19 +0800
committerSteven Miao <realmz6@gmail.com>2013-07-09 15:47:54 +0800
commit5e50175bdceefac46427c2cc6ae340a2ac045de5 (patch)
treee049dae9cf3118e3af110f7aea7aefed8b2c5970 /arch/blackfin/include
parent259c9b1712242fb3c841d49020a4f179f0c1920c (diff)
downloadlinux-5e50175bdceefac46427c2cc6ae340a2ac045de5.tar.bz2
bf609: rename bfin6xx_spi to bfin_spi3
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Steven Miao <realmz6@gmail.com>
Diffstat (limited to 'arch/blackfin/include')
-rw-r--r--arch/blackfin/include/asm/bfin_spi3.h (renamed from arch/blackfin/include/asm/bfin6xx_spi.h)4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/blackfin/include/asm/bfin6xx_spi.h b/arch/blackfin/include/asm/bfin_spi3.h
index 89370b653dcd..0957e65a54be 100644
--- a/arch/blackfin/include/asm/bfin6xx_spi.h
+++ b/arch/blackfin/include/asm/bfin_spi3.h
@@ -240,7 +240,7 @@ struct bfin_spi_regs {
#define MAX_CTRL_CS 8 /* cs in spi controller */
/* device.platform_data for SSP controller devices */
-struct bfin6xx_spi_master {
+struct bfin_spi3_master {
u16 num_chipselect;
u16 pin_req[7];
};
@@ -248,7 +248,7 @@ struct bfin6xx_spi_master {
/* spi_board_info.controller_data for SPI slave devices,
* copied to spi_device.platform_data ... mostly for dma tuning
*/
-struct bfin6xx_spi_chip {
+struct bfin_spi3_chip {
u32 control;
u16 cs_chg_udelay; /* Some devices require 16-bit delays */
u32 tx_dummy_val; /* tx value for rx only transfer */