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author | Olof Johansson <olof@lixom.net> | 2016-01-12 10:14:52 -0800 |
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committer | Olof Johansson <olof@lixom.net> | 2016-01-12 10:14:52 -0800 |
commit | d0ac6119aaae419baf824b996d1690fbe926971e (patch) | |
tree | e502b68de00024cd4ba74edf202ef55773ba912c /arch/arm | |
parent | 3e9121950c92a65e33e0163d2ba111b4d9293d4c (diff) | |
parent | a262e87ff354f12447bb6268bd63edf7ba1c20e0 (diff) | |
download | linux-d0ac6119aaae419baf824b996d1690fbe926971e.tar.bz2 |
Merge tag 'tegra-for-4.5-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into late/tegra
ARM: tegra: Core SoC changes for v4.5-rc1
The big thing here is Tegra210 support, which is really only the Kconfig
symbol. Other than that there's a few miscellaneous fixes.
* tag 'tegra-for-4.5-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: select USB_ULPI from EHCI rather than platform
ARM: tegra: Ensure entire dcache is flushed on entering LP0/1
amba: Hide TEGRA_AHB symbol
soc/tegra: Add Tegra210 support
soc/tegra: Provide per-SoC Kconfig symbols
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-tegra/Kconfig | 52 | ||||
-rw-r--r-- | arch/arm/mach-tegra/sleep-tegra20.S | 3 | ||||
-rw-r--r-- | arch/arm/mach-tegra/sleep-tegra30.S | 3 |
3 files changed, 6 insertions, 52 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index a90f3556017f..0fa8b84ed657 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -13,57 +13,5 @@ menuconfig ARCH_TEGRA select ARCH_HAS_RESET_CONTROLLER select RESET_CONTROLLER select SOC_BUS - select USB_ULPI if USB_PHY - select USB_ULPI_VIEWPORT if USB_PHY help This enables support for NVIDIA Tegra based systems. - -if ARCH_TEGRA - -config ARCH_TEGRA_2x_SOC - bool "Enable support for Tegra20 family" - select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP - select ARM_ERRATA_720789 - select ARM_ERRATA_754327 if SMP - select ARM_ERRATA_764369 if SMP - select PINCTRL_TEGRA20 - select PL310_ERRATA_727915 if CACHE_L2X0 - select PL310_ERRATA_769419 if CACHE_L2X0 - select TEGRA_TIMER - help - Support for NVIDIA Tegra AP20 and T20 processors, based on the - ARM CortexA9MP CPU and the ARM PL310 L2 cache controller - -config ARCH_TEGRA_3x_SOC - bool "Enable support for Tegra30 family" - select ARM_ERRATA_754322 - select ARM_ERRATA_764369 if SMP - select PINCTRL_TEGRA30 - select PL310_ERRATA_769419 if CACHE_L2X0 - select TEGRA_TIMER - help - Support for NVIDIA Tegra T30 processor family, based on the - ARM CortexA9MP CPU and the ARM PL310 L2 cache controller - -config ARCH_TEGRA_114_SOC - bool "Enable support for Tegra114 family" - select ARM_ERRATA_798181 if SMP - select ARM_L1_CACHE_SHIFT_6 - select HAVE_ARM_ARCH_TIMER - select PINCTRL_TEGRA114 - select TEGRA_TIMER - help - Support for NVIDIA Tegra T114 processor family, based on the - ARM CortexA15MP CPU - -config ARCH_TEGRA_124_SOC - bool "Enable support for Tegra124 family" - select ARM_L1_CACHE_SHIFT_6 - select HAVE_ARM_ARCH_TIMER - select PINCTRL_TEGRA124 - select TEGRA_TIMER - help - Support for NVIDIA Tegra T124 processor family, based on the - ARM CortexA15MP CPU - -endif diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S index e6b684e14322..f5d19667484e 100644 --- a/arch/arm/mach-tegra/sleep-tegra20.S +++ b/arch/arm/mach-tegra/sleep-tegra20.S @@ -231,8 +231,11 @@ ENDPROC(tegra20_cpu_is_resettable_soon) * tegra20_tear_down_core in IRAM */ ENTRY(tegra20_sleep_core_finish) + mov r4, r0 /* Flush, disable the L1 data cache and exit SMP */ + mov r0, #TEGRA_FLUSH_CACHE_ALL bl tegra_disable_clean_inv_dcache + mov r0, r4 mov32 r3, tegra_shut_off_mmu add r3, r3, r0 diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S index 9a2f0b051e10..16e5ff03383c 100644 --- a/arch/arm/mach-tegra/sleep-tegra30.S +++ b/arch/arm/mach-tegra/sleep-tegra30.S @@ -242,8 +242,11 @@ ENDPROC(tegra30_cpu_shutdown) * tegra30_tear_down_core in IRAM */ ENTRY(tegra30_sleep_core_finish) + mov r4, r0 /* Flush, disable the L1 data cache and exit SMP */ + mov r0, #TEGRA_FLUSH_CACHE_ALL bl tegra_disable_clean_inv_dcache + mov r0, r4 /* * Preload all the address literals that are needed for the |