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author | Jan Beulich <JBeulich@novell.com> | 2010-10-08 04:59:38 -0400 |
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committer | Guenter Roeck <guenter.roeck@ericsson.com> | 2010-10-25 14:11:21 -0700 |
commit | 3247800676c4a04352cde72b9935b57ffc72ce15 (patch) | |
tree | 5918c72fe4fbdf6f224f1e62661445870939e894 /arch/arm | |
parent | 17c10d61c750619324ee2a46c5a9e03a435fe212 (diff) | |
download | linux-3247800676c4a04352cde72b9935b57ffc72ce15.tar.bz2 |
hwmon: (coretemp) fix reading of microcode revision (v2)
According to the documentation, simply reading the respective MSR
isn't sufficient: It should be written with zeros, cpuid(1) be
executed, and then read (see arch/x86/kernel/cpu/intel.c for an
example).
v2: Fail probe when microcode revision cannot be determined, but is
needed to check for proper operation.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Chen Gong <gong.chen@linux.intel.com>
Cc: Jean Delvare <khali@linux-fr.org>
Acked-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com>
Diffstat (limited to 'arch/arm')
0 files changed, 0 insertions, 0 deletions