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author | Olof Johansson <olof@lixom.net> | 2014-07-07 21:47:03 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2014-07-07 21:47:03 -0700 |
commit | 12af7011e958f2d2cef3ec1e2b692fb93f9c3dac (patch) | |
tree | 3b151e6d039d8d37e47d3db997869f1fecf658ec /arch/arm | |
parent | b040614c5bf6af6657574299fdf0572d47b53366 (diff) | |
parent | a54c959d8be9d057b1a192e34a378b74dd81c5f6 (diff) | |
download | linux-12af7011e958f2d2cef3ec1e2b692fb93f9c3dac.tar.bz2 |
Merge tag 'versatile-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux into next/soc
Merge "DT IRQ and clock support for Versatile platforms" from Rob Herring.
This branch moves IRQ and clock support over to DT for the versatile
platforms.
* tag 'versatile-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
clk: versatile: add versatile OSC support
dts: versatile: add clock tree
ARM: timer-sp: allow getting timer1 clock from DT to fallback to legacy clock
dt/bindings: add compatible string for versatile osc clock
dt/bindings: arm-boards: add binding for Versatile core module
dts: versatile: add pl180 compatible strings
ARM: versatile: remove init_irq hook for DT boot
ARM: integrator: convert to use irqchip_init
irqchip: versatile-fpga: add support for arm,versatile-sic
irqchip: versatile-fpga: Add IRQCHIP_DECLARE support
dts: versatile: add missing irq controller properties
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/versatile-ab.dts | 81 | ||||
-rw-r--r-- | arch/arm/boot/dts/versatile-pb.dts | 12 | ||||
-rw-r--r-- | arch/arm/common/timer-sp.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-integrator/integrator_ap.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-integrator/integrator_cp.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-versatile/versatile_dt.c | 1 |
6 files changed, 97 insertions, 21 deletions
diff --git a/arch/arm/boot/dts/versatile-ab.dts b/arch/arm/boot/dts/versatile-ab.dts index e01e5a081def..36c771a2d765 100644 --- a/arch/arm/boot/dts/versatile-ab.dts +++ b/arch/arm/boot/dts/versatile-ab.dts @@ -19,6 +19,41 @@ reg = <0x0 0x08000000>; }; + xtal24mhz: xtal24mhz@24M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + }; + + core-module@10000000 { + compatible = "arm,core-module-versatile", "syscon"; + reg = <0x10000000 0x200>; + + /* OSC1 on AB, OSC4 on PB */ + osc1: cm_aux_osc@24M { + #clock-cells = <0>; + compatible = "arm,versatile-cm-auxosc"; + clocks = <&xtal24mhz>; + }; + + /* The timer clock is the 24 MHz oscillator divided to 1MHz */ + timclk: timclk@1M { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clock-div = <24>; + clock-mult = <1>; + clocks = <&xtal24mhz>; + }; + + pclk: pclk@24M { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clock-div = <1>; + clock-mult = <1>; + clocks = <&xtal24mhz>; + }; + }; + flash@34000000 { compatible = "arm,versatile-flash"; reg = <0x34000000 0x4000000>; @@ -59,6 +94,8 @@ interrupt-controller; #interrupt-cells = <1>; reg = <0x10140000 0x1000>; + clear-mask = <0xffffffff>; + valid-mask = <0xffffffff>; }; sic: intc@10003000 { @@ -68,69 +105,93 @@ reg = <0x10003000 0x1000>; interrupt-parent = <&vic>; interrupts = <31>; /* Cascaded to vic */ + clear-mask = <0xffffffff>; + valid-mask = <0xffc203f8>; }; dma@10130000 { compatible = "arm,pl081", "arm,primecell"; reg = <0x10130000 0x1000>; interrupts = <17>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; uart0: uart@101f1000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x101f1000 0x1000>; interrupts = <12>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "uartclk", "apb_pclk"; }; uart1: uart@101f2000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x101f2000 0x1000>; interrupts = <13>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "uartclk", "apb_pclk"; }; uart2: uart@101f3000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x101f3000 0x1000>; interrupts = <14>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "uartclk", "apb_pclk"; }; smc@10100000 { compatible = "arm,primecell"; reg = <0x10100000 0x1000>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; mpmc@10110000 { compatible = "arm,primecell"; reg = <0x10110000 0x1000>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; display@10120000 { compatible = "arm,pl110", "arm,primecell"; reg = <0x10120000 0x1000>; interrupts = <16>; + clocks = <&osc1>, <&pclk>; + clock-names = "clcd", "apb_pclk"; }; sctl@101e0000 { compatible = "arm,primecell"; reg = <0x101e0000 0x1000>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; watchdog@101e1000 { compatible = "arm,primecell"; reg = <0x101e1000 0x1000>; interrupts = <0>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; timer@101e2000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x101e2000 0x1000>; interrupts = <4>; + clocks = <&timclk>, <&timclk>, <&pclk>; + clock-names = "timer0", "timer1", "apb_pclk"; }; timer@101e3000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x101e3000 0x1000>; interrupts = <5>; + clocks = <&timclk>, <&timclk>, <&pclk>; + clock-names = "timer0", "timer1", "apb_pclk"; }; gpio0: gpio@101e4000 { @@ -141,6 +202,8 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; gpio1: gpio@101e5000 { @@ -151,24 +214,32 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; rtc@101e8000 { compatible = "arm,pl030", "arm,primecell"; reg = <0x101e8000 0x1000>; interrupts = <10>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; sci@101f0000 { compatible = "arm,primecell"; reg = <0x101f0000 0x1000>; interrupts = <15>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; ssp@101f4000 { compatible = "arm,pl022", "arm,primecell"; reg = <0x101f4000 0x1000>; interrupts = <11>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "SSPCLK", "apb_pclk"; }; fpga { @@ -181,23 +252,31 @@ compatible = "arm,primecell"; reg = <0x4000 0x1000>; interrupts = <24>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; mmc@5000 { - compatible = "arm,primecell"; + compatible = "arm,pl180", "arm,primecell"; reg = < 0x5000 0x1000>; interrupts-extended = <&vic 22 &sic 2>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "mclk", "apb_pclk"; }; kmi@6000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x6000 0x1000>; interrupt-parent = <&sic>; interrupts = <3>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "KMIREFCLK", "apb_pclk"; }; kmi@7000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x7000 0x1000>; interrupt-parent = <&sic>; interrupts = <4>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "KMIREFCLK", "apb_pclk"; }; }; }; diff --git a/arch/arm/boot/dts/versatile-pb.dts b/arch/arm/boot/dts/versatile-pb.dts index 65f657711323..d025048119d3 100644 --- a/arch/arm/boot/dts/versatile-pb.dts +++ b/arch/arm/boot/dts/versatile-pb.dts @@ -13,6 +13,8 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; gpio3: gpio@101e7000 { @@ -23,6 +25,8 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + clocks = <&pclk>; + clock-names = "apb_pclk"; }; fpga { @@ -31,17 +35,23 @@ reg = <0x9000 0x1000>; interrupt-parent = <&sic>; interrupts = <6>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "uartclk", "apb_pclk"; }; sci@a000 { compatible = "arm,primecell"; reg = <0xa000 0x1000>; interrupt-parent = <&sic>; interrupts = <5>; + clocks = <&xtal24mhz>; + clock-names = "apb_pclk"; }; mmc@b000 { - compatible = "arm,primecell"; + compatible = "arm,pl180", "arm,primecell"; reg = <0xb000 0x1000>; interrupts-extended = <&vic 23 &sic 2>; + clocks = <&xtal24mhz>, <&pclk>; + clock-names = "mclk", "apb_pclk"; }; }; }; diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c index fd6bff0c5b96..19211324772f 100644 --- a/arch/arm/common/timer-sp.c +++ b/arch/arm/common/timer-sp.c @@ -233,13 +233,13 @@ static void __init sp804_of_init(struct device_node *np) if (IS_ERR(clk1)) clk1 = NULL; - /* Get the 2nd clock if the timer has 2 timer clocks */ + /* Get the 2nd clock if the timer has 3 timer clocks */ if (of_count_phandle_with_args(np, "clocks", "#clock-cells") == 3) { clk2 = of_clk_get(np, 1); if (IS_ERR(clk2)) { pr_err("sp804: %s clock not found: %d\n", np->name, (int)PTR_ERR(clk2)); - goto err; + clk2 = NULL; } } else clk2 = clk1; diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 660ca6feff40..8ca290b479b1 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -31,7 +31,7 @@ #include <linux/clockchips.h> #include <linux/interrupt.h> #include <linux/io.h> -#include <linux/irqchip/versatile-fpga.h> +#include <linux/irqchip.h> #include <linux/mtd/physmap.h> #include <linux/clk.h> #include <linux/platform_data/clk-integrator.h> @@ -439,15 +439,10 @@ static void __init ap_of_timer_init(void) integrator_clockevent_init(rate, base, irq); } -static const struct of_device_id fpga_irq_of_match[] __initconst = { - { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, }, - { /* Sentinel */ } -}; - static void __init ap_init_irq_of(void) { cm_init(); - of_irq_init(fpga_irq_of_match); + irqchip_init(); } /* For the Device Tree, add in the UART callbacks as AUXDATA */ @@ -558,7 +553,6 @@ DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)") .map_io = ap_map_io, .init_early = ap_init_early, .init_irq = ap_init_irq_of, - .handle_irq = fpga_handle_irq, .init_time = ap_of_timer_init, .init_machine = ap_init_of, .restart = integrator_restart, diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index 0e57f8f820a5..5236ebee249c 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c @@ -20,7 +20,7 @@ #include <linux/amba/clcd.h> #include <linux/amba/mmci.h> #include <linux/io.h> -#include <linux/irqchip/versatile-fpga.h> +#include <linux/irqchip.h> #include <linux/gfp.h> #include <linux/mtd/physmap.h> #include <linux/of_irq.h> @@ -235,15 +235,10 @@ static void __init intcp_init_early(void) sched_clock_register(intcp_read_sched_clock, 32, 24000000); } -static const struct of_device_id fpga_irq_of_match[] __initconst = { - { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, }, - { /* Sentinel */ } -}; - static void __init intcp_init_irq_of(void) { cm_init(); - of_irq_init(fpga_irq_of_match); + irqchip_init(); } /* @@ -329,7 +324,6 @@ DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)") .map_io = intcp_map_io, .init_early = intcp_init_early, .init_irq = intcp_init_irq_of, - .handle_irq = fpga_handle_irq, .init_machine = intcp_init_of, .restart = integrator_restart, .dt_compat = intcp_dt_board_compat, diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c index 3621b000a0f6..9f9bc61ca64b 100644 --- a/arch/arm/mach-versatile/versatile_dt.c +++ b/arch/arm/mach-versatile/versatile_dt.c @@ -44,7 +44,6 @@ static const char *versatile_dt_match[] __initconst = { DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)") .map_io = versatile_map_io, .init_early = versatile_init_early, - .init_irq = versatile_init_irq, .init_machine = versatile_dt_init, .dt_compat = versatile_dt_match, .restart = versatile_restart, |