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authorKristina Martsenko <kristina.martsenko@arm.com>2018-01-15 15:23:50 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2018-01-15 18:20:41 +0000
commit39610a68d9a9a9c6e71be731d071c405e4f2434b (patch)
tree0ce1cda7ac782a5ea604d980920124beb37f9b50 /arch/arm64
parent98732d1b189b626a7593afd02dc3d2dc3f6c545a (diff)
downloadlinux-39610a68d9a9a9c6e71be731d071c405e4f2434b.tar.bz2
arm64: fix comment above tcr_compute_pa_size
The 'pos' argument is used to select where in TCR to write the value: the IPS or PS bitfield. Fixes: 787fd1d019b2 ("arm64: limit PA size to supported range") Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/include/asm/assembler.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 5dc4856f3bb9..1645e0d3a2c1 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -360,7 +360,7 @@ alternative_endif
* ID_AA64MMFR0_EL1.PARange value
*
* tcr: register with the TCR_ELx value to be updated
- * pos: PARange bitfield position
+ * pos: IPS or PS bitfield position
* tmp{0,1}: temporary registers
*/
.macro tcr_compute_pa_size, tcr, pos, tmp0, tmp1