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authorCatalin Marinas <catalin.marinas@arm.com>2020-12-09 18:04:48 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2020-12-09 18:04:48 +0000
commitba4259a6f87a4d7b5039673569db06b6d8b74cf3 (patch)
treeca880ae0a2f555ee49b572c97703ad6a9da9fcff /arch/arm64/mm/proc.S
parente0f7a8d5e87f31da15a80fcf038f6296bae26f38 (diff)
parent344f2db2a18af45faafce13133c84c4f076876a6 (diff)
downloadlinux-ba4259a6f87a4d7b5039673569db06b6d8b74cf3.tar.bz2
Merge branch 'for-next/misc' into for-next/core
* for-next/misc: : Miscellaneous patches arm64: vmlinux.lds.S: Drop redundant *.init.rodata.* kasan: arm64: set TCR_EL1.TBID1 when enabled arm64: mte: optimize asynchronous tag check fault flag check arm64/mm: add fallback option to allocate virtually contiguous memory arm64/smp: Drop the macro S(x,s) arm64: consistently use reserved_pg_dir arm64: kprobes: Remove redundant kprobe_step_ctx # Conflicts: # arch/arm64/kernel/vmlinux.lds.S
Diffstat (limited to 'arch/arm64/mm/proc.S')
-rw-r--r--arch/arm64/mm/proc.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index 29f064e117d9..a0831bf8a018 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -40,7 +40,7 @@
#define TCR_CACHE_FLAGS TCR_IRGN_WBWA | TCR_ORGN_WBWA
#ifdef CONFIG_KASAN_SW_TAGS
-#define TCR_KASAN_FLAGS TCR_TBI1
+#define TCR_KASAN_FLAGS TCR_TBI1 | TCR_TBID1
#else
#define TCR_KASAN_FLAGS 0
#endif
@@ -168,7 +168,7 @@ SYM_FUNC_END(cpu_do_resume)
.pushsection ".idmap.text", "awx"
.macro __idmap_cpu_set_reserved_ttbr1, tmp1, tmp2
- adrp \tmp1, empty_zero_page
+ adrp \tmp1, reserved_pg_dir
phys_to_ttbr \tmp2, \tmp1
offset_ttbr1 \tmp2, \tmp1
msr ttbr1_el1, \tmp2