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| author | Marc Zyngier <maz@kernel.org> | 2022-12-05 14:34:32 +0000 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2022-12-05 14:39:53 +0000 |
| commit | 753d734f3f347e7fc49b819472bbf61dcfc1a16f (patch) | |
| tree | ee53840aa9d51863b24fb1a34d7ea0845e7cab38 /arch/arm64/kvm/sys_regs.c | |
| parent | 86f27d849b4713eb9ccf679b084e7d4453cbc73d (diff) | |
| parent | acb3f4bc2108dca531f81233383e21f0bdc02267 (diff) | |
| download | linux-753d734f3f347e7fc49b819472bbf61dcfc1a16f.tar.bz2 | |
Merge remote-tracking branch 'arm64/for-next/sysregs' into kvmarm-master/next
Merge arm64's sysreg repainting branch to avoid too many
ugly conflicts...
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'arch/arm64/kvm/sys_regs.c')
| -rw-r--r-- | arch/arm64/kvm/sys_regs.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 528d253c571a..d5ee52d6bf73 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1071,9 +1071,9 @@ static u8 vcpu_pmuver(const struct kvm_vcpu *vcpu) static u8 perfmon_to_pmuver(u8 perfmon) { switch (perfmon) { - case ID_DFR0_PERFMON_8_0: + case ID_DFR0_EL1_PerfMon_PMUv3: return ID_AA64DFR0_EL1_PMUVer_IMP; - case ID_DFR0_PERFMON_IMP_DEF: + case ID_DFR0_EL1_PerfMon_IMPDEF: return ID_AA64DFR0_EL1_PMUVer_IMP_DEF; default: /* Anything ARMv8.1+ and NI have the same value. For now. */ @@ -1085,9 +1085,9 @@ static u8 pmuver_to_perfmon(u8 pmuver) { switch (pmuver) { case ID_AA64DFR0_EL1_PMUVer_IMP: - return ID_DFR0_PERFMON_8_0; + return ID_DFR0_EL1_PerfMon_PMUv3; case ID_AA64DFR0_EL1_PMUVer_IMP_DEF: - return ID_DFR0_PERFMON_IMP_DEF; + return ID_DFR0_EL1_PerfMon_IMPDEF; default: /* Anything ARMv8.1+ and NI have the same value. For now. */ return pmuver; @@ -1151,8 +1151,8 @@ static u64 read_id_reg(const struct kvm_vcpu *vcpu, struct sys_reg_desc const *r val &= ~ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMSVer); break; case SYS_ID_DFR0_EL1: - val &= ~ARM64_FEATURE_MASK(ID_DFR0_PERFMON); - val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_DFR0_PERFMON), + val &= ~ARM64_FEATURE_MASK(ID_DFR0_EL1_PerfMon); + val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_DFR0_EL1_PerfMon), pmuver_to_perfmon(vcpu_pmuver(vcpu))); break; } @@ -1307,12 +1307,12 @@ static int set_id_dfr0_el1(struct kvm_vcpu *vcpu, * AArch64 side (as everything is emulated with that), and * that this is a PMUv3. */ - perfmon = FIELD_GET(ARM64_FEATURE_MASK(ID_DFR0_PERFMON), val); - if ((perfmon != ID_DFR0_PERFMON_IMP_DEF && perfmon > host_perfmon) || - (perfmon != 0 && perfmon < ID_DFR0_PERFMON_8_0)) + perfmon = FIELD_GET(ARM64_FEATURE_MASK(ID_DFR0_EL1_PerfMon), val); + if ((perfmon != ID_DFR0_EL1_PerfMon_IMPDEF && perfmon > host_perfmon) || + (perfmon != 0 && perfmon < ID_DFR0_EL1_PerfMon_PMUv3)) return -EINVAL; - valid_pmu = (perfmon != 0 && perfmon != ID_DFR0_PERFMON_IMP_DEF); + valid_pmu = (perfmon != 0 && perfmon != ID_DFR0_EL1_PerfMon_IMPDEF); /* Make sure view register and PMU support do match */ if (kvm_vcpu_has_pmu(vcpu) != valid_pmu) @@ -1320,7 +1320,7 @@ static int set_id_dfr0_el1(struct kvm_vcpu *vcpu, /* We can only differ with PerfMon, and anything else is an error */ val ^= read_id_reg(vcpu, rd); - val &= ~ARM64_FEATURE_MASK(ID_DFR0_PERFMON); + val &= ~ARM64_FEATURE_MASK(ID_DFR0_EL1_PerfMon); if (val) return -EINVAL; |