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author | Ingo Molnar <mingo@kernel.org> | 2016-09-05 12:09:59 +0200 |
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committer | Ingo Molnar <mingo@kernel.org> | 2016-09-05 12:09:59 +0200 |
commit | 2cc538412a1ca103923ec400a339a5b3833e0280 (patch) | |
tree | c141b83e1da736c3d069ed491816d0096e1b532a /arch/arm64/kernel | |
parent | 36e674a05164cdbb9d4a5b1b0b279fabae6c13bd (diff) | |
parent | 58763148758057ffc447bf990321d3ea86d199a0 (diff) | |
download | linux-2cc538412a1ca103923ec400a339a5b3833e0280.tar.bz2 |
Merge branch 'perf/urgent' into perf/core, to pick up fixed and resolve conflicts
Conflicts:
kernel/events/core.c
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/arm64/kernel')
-rw-r--r-- | arch/arm64/kernel/head.S | 3 | ||||
-rw-r--r-- | arch/arm64/kernel/sleep.S | 10 |
2 files changed, 12 insertions, 1 deletions
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index b77f58355da1..3e7b050e99dc 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -757,6 +757,9 @@ ENTRY(__enable_mmu) isb bl __create_page_tables // recreate kernel mapping + tlbi vmalle1 // Remove any stale TLB entries + dsb nsh + msr sctlr_el1, x19 // re-enable the MMU isb ic iallu // flush instructions fetched diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S index 9a3aec97ac09..ccf79d849e0a 100644 --- a/arch/arm64/kernel/sleep.S +++ b/arch/arm64/kernel/sleep.S @@ -101,12 +101,20 @@ ENTRY(cpu_resume) bl el2_setup // if in EL2 drop to EL1 cleanly /* enable the MMU early - so we can access sleep_save_stash by va */ adr_l lr, __enable_mmu /* __cpu_setup will return here */ - ldr x27, =_cpu_resume /* __enable_mmu will branch here */ + adr_l x27, _resume_switched /* __enable_mmu will branch here */ adrp x25, idmap_pg_dir adrp x26, swapper_pg_dir b __cpu_setup ENDPROC(cpu_resume) + .pushsection ".idmap.text", "ax" +_resume_switched: + ldr x8, =_cpu_resume + br x8 +ENDPROC(_resume_switched) + .ltorg + .popsection + ENTRY(_cpu_resume) mrs x1, mpidr_el1 adrp x8, mpidr_hash |