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| author | Seiya Wang <seiya.wang@mediatek.com> | 2021-02-03 13:53:47 +0800 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2021-02-03 20:42:54 +0000 |
| commit | db2bb91f2e8e73d85876d1665608e834d91d21ee (patch) | |
| tree | b181e1932ba9c129f7c45e6d49a9ae584b0e425a /arch/arm64/kernel/perf_event.c | |
| parent | 2ceee7ed4c6c9e3eec1004aee43608bc98b10603 (diff) | |
| download | linux-db2bb91f2e8e73d85876d1665608e834d91d21ee.tar.bz2 | |
arm64: perf: add support for Cortex-A78
Add support for Cortex-A78 using generic PMUv3 for now.
Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20210203055348.4935-2-seiya.wang@mediatek.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/kernel/perf_event.c')
| -rw-r--r-- | arch/arm64/kernel/perf_event.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 59b1eed52236..b6d0b2cbdc79 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -1188,6 +1188,12 @@ static int armv8_a77_pmu_init(struct arm_pmu *cpu_pmu) armv8_pmuv3_map_event); } +static int armv8_a78_pmu_init(struct arm_pmu *cpu_pmu) +{ + return armv8_pmu_init_nogroups(cpu_pmu, "armv8_cortex_a78", + armv8_pmuv3_map_event); +} + static int armv8_e1_pmu_init(struct arm_pmu *cpu_pmu) { return armv8_pmu_init_nogroups(cpu_pmu, "armv8_neoverse_e1", @@ -1225,6 +1231,7 @@ static const struct of_device_id armv8_pmu_of_device_ids[] = { {.compatible = "arm,cortex-a75-pmu", .data = armv8_a75_pmu_init}, {.compatible = "arm,cortex-a76-pmu", .data = armv8_a76_pmu_init}, {.compatible = "arm,cortex-a77-pmu", .data = armv8_a77_pmu_init}, + {.compatible = "arm,cortex-a78-pmu", .data = armv8_a78_pmu_init}, {.compatible = "arm,neoverse-e1-pmu", .data = armv8_e1_pmu_init}, {.compatible = "arm,neoverse-n1-pmu", .data = armv8_n1_pmu_init}, {.compatible = "cavium,thunder-pmu", .data = armv8_thunder_pmu_init}, |