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| author | Pasha Tatashin <pasha.tatashin@soleen.com> | 2021-09-30 14:31:09 +0000 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2021-10-01 13:31:00 +0100 |
| commit | 3744b5280e67f54579abe92576deec0079242323 (patch) | |
| tree | e0a9a519d17edcebe48b5af1acecde8ab95f202c /arch/arm64/kernel/hibernate-asm.S | |
| parent | 19a046f07ce5a5c34ebb6432192d98cfdb38444f (diff) | |
| download | linux-3744b5280e67f54579abe92576deec0079242323.tar.bz2 | |
arm64: kexec: install a copy of the linear-map
To perform the kexec relocation with the MMU enabled, we need a copy
of the linear map.
Create one, and install it from the relocation code. This has to be done
from the assembly code as it will be idmapped with TTBR0. The kernel
runs in TTRB1, so can't use the break-before-make sequence on the mapping
it is executing from.
The makes no difference yet as the relocation code runs with the MMU
disabled.
Suggested-by: James Morse <james.morse@arm.com>
Signed-off-by: Pasha Tatashin <pasha.tatashin@soleen.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20210930143113.1502553-12-pasha.tatashin@soleen.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/kernel/hibernate-asm.S')
| -rw-r--r-- | arch/arm64/kernel/hibernate-asm.S | 20 |
1 files changed, 0 insertions, 20 deletions
diff --git a/arch/arm64/kernel/hibernate-asm.S b/arch/arm64/kernel/hibernate-asm.S index a30a2c3f905e..0e1d9c3c6a93 100644 --- a/arch/arm64/kernel/hibernate-asm.S +++ b/arch/arm64/kernel/hibernate-asm.S @@ -16,26 +16,6 @@ #include <asm/virt.h> /* - * To prevent the possibility of old and new partial table walks being visible - * in the tlb, switch the ttbr to a zero page when we invalidate the old - * records. D4.7.1 'General TLB maintenance requirements' in ARM DDI 0487A.i - * Even switching to our copied tables will cause a changed output address at - * each stage of the walk. - */ -.macro break_before_make_ttbr_switch zero_page, page_table, tmp, tmp2 - phys_to_ttbr \tmp, \zero_page - msr ttbr1_el1, \tmp - isb - tlbi vmalle1 - dsb nsh - phys_to_ttbr \tmp, \page_table - offset_ttbr1 \tmp, \tmp2 - msr ttbr1_el1, \tmp - isb -.endm - - -/* * Resume from hibernate * * Loads temporary page tables then restores the memory image. |