diff options
author | James Morse <james.morse@arm.com> | 2022-11-30 17:16:07 +0000 |
---|---|---|
committer | Will Deacon <will@kernel.org> | 2022-12-01 15:53:13 +0000 |
commit | e0bf98fef3fd0f934deee3ebc3a03b88aec5b501 (patch) | |
tree | 50335e353ad92c8036f4b56b038ecda781f4a064 /arch/arm64/include/asm/sysreg.h | |
parent | eef4344f779f6aee9ec9d49a03ec2317a85a744e (diff) | |
download | linux-e0bf98fef3fd0f934deee3ebc3a03b88aec5b501.tar.bz2 |
arm64/sysreg: Standardise naming for ID_PFR0_EL1
To convert the 32bit id registers to use the sysreg generation, they
must first have a regular pattern, to match the symbols the script
generates.
Ensure symbols for the ID_PFR0_EL1 register have an _EL1 suffix,
and use lower case in feature names where the arm-arm does the same.
No functional change.
Signed-off-by: James Morse <james.morse@arm.com>
Link: https://lore.kernel.org/r/20221130171637.718182-9-james.morse@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/include/asm/sysreg.h')
-rw-r--r-- | arch/arm64/include/asm/sysreg.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 10a00b219851..6b4975132db9 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -753,12 +753,12 @@ #define ID_MMFR5_EL1_ETS_SHIFT 0 -#define ID_PFR0_DIT_SHIFT 24 -#define ID_PFR0_CSV2_SHIFT 16 -#define ID_PFR0_STATE3_SHIFT 12 -#define ID_PFR0_STATE2_SHIFT 8 -#define ID_PFR0_STATE1_SHIFT 4 -#define ID_PFR0_STATE0_SHIFT 0 +#define ID_PFR0_EL1_DIT_SHIFT 24 +#define ID_PFR0_EL1_CSV2_SHIFT 16 +#define ID_PFR0_EL1_State3_SHIFT 12 +#define ID_PFR0_EL1_State2_SHIFT 8 +#define ID_PFR0_EL1_State1_SHIFT 4 +#define ID_PFR0_EL1_State0_SHIFT 0 #define ID_DFR0_PERFMON_SHIFT 24 #define ID_DFR0_MPROFDBG_SHIFT 20 |